1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
|
/*
* Device Tree Source for AM33XX SoC
*
* Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
*
* This file is licensed under the terms of the GNU General Public License
* version 2. This program is licensed "as is" without any warranty of any
* kind, whether express or implied.
*/
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/am33xx.h>
#include "skeleton.dtsi"
/ {
compatible = "ti,am33xx";
interrupt-parent = <&intc>;
aliases {
serial0 = &uart0;
serial1 = &uart1;
serial2 = &uart2;
serial3 = &uart3;
serial4 = &uart4;
serial5 = &uart5;
d_can0 = &dcan0;
d_can1 = &dcan1;
usb0 = &usb0;
usb1 = &usb1;
phy0 = &usb0_phy;
phy1 = &usb1_phy;
};
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
compatible = "arm,cortex-a8";
device_type = "cpu";
reg = <0>;
/*
* To consider voltage drop between PMIC and SoC,
* tolerance value is reduced to 2% from 4% and
* voltage value is increased as a precaution.
*/
operating-points = <
/* kHz uV */
720000 1285000
600000 1225000
500000 1125000
275000 1125000
>;
voltage-tolerance = <2>; /* 2 percentage */
clock-latency = <300000>; /* From omap-cpufreq driver */
};
};
/*
* The soc node represents the soc top level view. It is uses for IPs
* that are not memory mapped in the MPU view or for the MPU itself.
*/
soc {
compatible = "ti,omap-infra";
mpu {
compatible = "ti,omap3-mpu";
ti,hwmods = "mpu";
};
};
am33xx_pinmux: pinmux@44e10800 {
compatible = "pinctrl-single";
reg = <0x44e10800 0x0238>;
#address-cells = <1>;
#size-cells = <0>;
pinctrl-single,register-width = <32>;
pinctrl-single,function-mask = <0x7f>;
};
/*
* XXX: Use a flat representation of the AM33XX interconnect.
* The real AM33XX interconnect network is quite complex.Since
* that will not bring real advantage to represent that in DT
* for the moment, just use a fake OCP bus entry to represent
* the whole bus hierarchy.
*/
ocp {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
ti,hwmods = "l3_main";
intc: interrupt-controller@48200000 {
compatible = "ti,omap2-intc";
interrupt-controller;
#interrupt-cells = <1>;
ti,intc-size = <128>;
reg = <0x48200000 0x1000>;
};
gpio0: gpio@44e07000 {
compatible = "ti,omap4-gpio";
ti,hwmods = "gpio1";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
reg = <0x44e07000 0x1000>;
interrupts = <96>;
};
gpio1: gpio@4804c000 {
compatible = "ti,omap4-gpio";
ti,hwmods = "gpio2";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
reg = <0x4804c000 0x1000>;
interrupts = <98>;
};
gpio2: gpio@481ac000 {
compatible = "ti,omap4-gpio";
ti,hwmods = "gpio3";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
reg = <0x481ac000 0x1000>;
interrupts = <32>;
};
gpio3: gpio@481ae000 {
compatible = "ti,omap4-gpio";
ti,hwmods = "gpio4";
gpio-controller;
#gpio-cells = <2>;
interrupt-controller;
#interrupt-cells = <1>;
reg = <0x481ae000 0x1000>;
interrupts = <62>;
};
uart0: serial@44e09000 {
compatible = "ti,omap3-uart";
ti,hwmods = "uart1";
clock-frequency = <48000000>;
reg = <0x44e09000 0x2000>;
interrupts = <72>;
status = "disabled";
};
uart1: serial@48022000 {
compatible = "ti,omap3-uart";
ti,hwmods = "uart2";
clock-frequency = <48000000>;
reg = <0x48022000 0x2000>;
interrupts = <73>;
status = "disabled";
};
uart2: serial@48024000 {
compatible = "ti,omap3-uart";
ti,hwmods = "uart3";
clock-frequency = <48000000>;
reg = <0x48024000 0x2000>;
interrupts = <74>;
status = "disabled";
};
uart3: serial@481a6000 {
compatible = "ti,omap3-uart";
ti,hwmods = "uart4";
clock-frequency = <48000000>;
reg = <0x481a6000 0x2000>;
interrupts = <44>;
status = "disabled";
};
uart4: serial@481a8000 {
compatible = "ti,omap3-uart";
ti,hwmods = "uart5";
clock-frequency = <48000000>;
reg = <0x481a8000 0x2000>;
interrupts = <45>;
status = "disabled";
};
uart5: serial@481aa000 {
compatible = "ti,omap3-uart";
ti,hwmods = "uart6";
clock-frequency = <48000000>;
reg = <0x481aa000 0x2000>;
interrupts = <46>;
status = "disabled";
};
i2c0: i2c@44e0b000 {
compatible = "ti,omap4-i2c";
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c1";
reg = <0x44e0b000 0x1000>;
interrupts = <70>;
status = "disabled";
};
i2c1: i2c@4802a000 {
compatible = "ti,omap4-i2c";
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c2";
reg = <0x4802a000 0x1000>;
interrupts = <71>;
status = "disabled";
};
i2c2: i2c@4819c000 {
compatible = "ti,omap4-i2c";
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "i2c3";
reg = <0x4819c000 0x1000>;
interrupts = <30>;
status = "disabled";
};
wdt2: wdt@44e35000 {
compatible = "ti,omap3-wdt";
ti,hwmods = "wd_timer2";
reg = <0x44e35000 0x1000>;
interrupts = <91>;
};
dcan0: d_can@481cc000 {
compatible = "bosch,d_can";
ti,hwmods = "d_can0";
reg = <0x481cc000 0x2000
0x44e10644 0x4>;
interrupts = <52>;
status = "disabled";
};
dcan1: d_can@481d0000 {
compatible = "bosch,d_can";
ti,hwmods = "d_can1";
reg = <0x481d0000 0x2000
0x44e10644 0x4>;
interrupts = <55>;
status = "disabled";
};
timer1: timer@44e31000 {
compatible = "ti,am335x-timer-1ms";
reg = <0x44e31000 0x400>;
interrupts = <67>;
ti,hwmods = "timer1";
ti,timer-alwon;
};
timer2: timer@48040000 {
compatible = "ti,am335x-timer";
reg = <0x48040000 0x400>;
interrupts = <68>;
ti,hwmods = "timer2";
};
timer3: timer@48042000 {
compatible = "ti,am335x-timer";
reg = <0x48042000 0x400>;
interrupts = <69>;
ti,hwmods = "timer3";
};
timer4: timer@48044000 {
compatible = "ti,am335x-timer";
reg = <0x48044000 0x400>;
interrupts = <92>;
ti,hwmods = "timer4";
ti,timer-pwm;
};
timer5: timer@48046000 {
compatible = "ti,am335x-timer";
reg = <0x48046000 0x400>;
interrupts = <93>;
ti,hwmods = "timer5";
ti,timer-pwm;
};
timer6: timer@48048000 {
compatible = "ti,am335x-timer";
reg = <0x48048000 0x400>;
interrupts = <94>;
ti,hwmods = "timer6";
ti,timer-pwm;
};
timer7: timer@4804a000 {
compatible = "ti,am335x-timer";
reg = <0x4804a000 0x400>;
interrupts = <95>;
ti,hwmods = "timer7";
ti,timer-pwm;
};
rtc@44e3e000 {
compatible = "ti,da830-rtc";
reg = <0x44e3e000 0x1000>;
interrupts = <75
76>;
ti,hwmods = "rtc";
};
spi0: spi@48030000 {
compatible = "ti,omap4-mcspi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x48030000 0x400>;
interrupts = <65>;
ti,spi-num-cs = <2>;
ti,hwmods = "spi0";
status = "disabled";
};
spi1: spi@481a0000 {
compatible = "ti,omap4-mcspi";
#address-cells = <1>;
#size-cells = <0>;
reg = <0x481a0000 0x400>;
interrupts = <125>;
ti,spi-num-cs = <2>;
ti,hwmods = "spi1";
status = "disabled";
};
usb: usb@47400000 {
compatible = "ti,am33xx-usb";
reg = <0x47400000 0x1000>;
ranges;
#address-cells = <1>;
#size-cells = <1>;
ti,hwmods = "usb_otg_hs";
status = "disabled";
ctrl_mod: control@44e10000 {
compatible = "ti,am335x-usb-ctrl-module";
reg = <0x44e10620 0x10
0x44e10648 0x4>;
reg-names = "phy_ctrl", "wakeup";
status = "disabled";
};
usb0_phy: phy@47401300 {
compatible = "ti,am335x-usb-phy";
reg = <0x47401300 0x100>;
reg-names = "phy";
status = "disabled";
ti,ctrl_mod = <&ctrl_mod>;
};
usb0: usb@47401000 {
compatible = "ti,musb-am33xx";
ranges;
#address-cells = <1>;
#size-cells = <1>;
reg = <0x47401000 0x200>;
reg-names = "control";
status = "disabled";
musb0: usb@47401400 {
compatible = "mg,musbmhdrc";
reg = <0x47401400 0x400>;
reg-names = "mc";
interrupts = <18>;
interrupt-names = "mc";
multipoint = <1>;
num-eps = <16>;
ram-bits = <12>;
port-mode = <3>;
power = <250>;
phys = <&usb0_phy>;
dmas = <&cppi41dma 0 0 &cppi41dma 1 0
&cppi41dma 2 0 &cppi41dma 3 0
&cppi41dma 4 0 &cppi41dma 5 0
&cppi41dma 6 0 &cppi41dma 7 0
&cppi41dma 8 0 &cppi41dma 9 0
&cppi41dma 10 0 &cppi41dma 11 0
&cppi41dma 12 0 &cppi41dma 13 0
&cppi41dma 14 0 &cppi41dma 0 1
&cppi41dma 1 1 &cppi41dma 2 1
&cppi41dma 3 1 &cppi41dma 4 1
&cppi41dma 5 1 &cppi41dma 6 1
&cppi41dma 7 1 &cppi41dma 8 1
&cppi41dma 9 1 &cppi41dma 10 1
&cppi41dma 11 1 &cppi41dma 12 1
&cppi41dma 13 1 &cppi41dma 14 1>;
dma-names =
"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
"rx14", "rx15",
"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
"tx14", "tx15";
};
};
usb1_phy: phy@47401b00 {
compatible = "ti,am335x-usb-phy";
reg = <0x47401b00 0x100>;
reg-names = "phy";
status = "disabled";
ti,ctrl_mod = <&ctrl_mod>;
};
usb1: usb@47401800 {
compatible = "ti,musb-am33xx";
ranges;
#address-cells = <1>;
#size-cells = <1>;
reg = <0x47401800 0x200>;
reg-names = "control";
status = "disabled";
musb1: usb@47401c00 {
compatible = "mg,musbmhdrc";
reg = <0x47401c00 0x400>;
reg-names = "mc";
interrupts = <19>;
interrupt-names = "mc";
multipoint = <1>;
num-eps = <16>;
ram-bits = <12>;
port-mode = <3>;
power = <250>;
phys = <&usb1_phy>;
dmas = <&cppi41dma 15 0 &cppi41dma 16 0
&cppi41dma 17 0 &cppi41dma 18 0
&cppi41dma 19 0 &cppi41dma 20 0
&cppi41dma 21 0 &cppi41dma 22 0
&cppi41dma 23 0 &cppi41dma 24 0
&cppi41dma 25 0 &cppi41dma 26 0
&cppi41dma 27 0 &cppi41dma 28 0
&cppi41dma 29 0 &cppi41dma 15 1
&cppi41dma 16 1 &cppi41dma 17 1
&cppi41dma 18 1 &cppi41dma 19 1
&cppi41dma 20 1 &cppi41dma 21 1
&cppi41dma 22 1 &cppi41dma 23 1
&cppi41dma 24 1 &cppi41dma 25 1
&cppi41dma 26 1 &cppi41dma 27 1
&cppi41dma 28 1 &cppi41dma 29 1>;
dma-names =
"rx1", "rx2", "rx3", "rx4", "rx5", "rx6", "rx7",
"rx8", "rx9", "rx10", "rx11", "rx12", "rx13",
"rx14", "rx15",
"tx1", "tx2", "tx3", "tx4", "tx5", "tx6", "tx7",
"tx8", "tx9", "tx10", "tx11", "tx12", "tx13",
"tx14", "tx15";
};
};
cppi41dma: dma@07402000 {
compatible = "ti,am3359-cppi41";
reg = <0x47400000 0x1000
0x47402000 0x1000
0x47403000 0x1000
0x47404000 0x4000>;
reg-names = "glue controller scheduler queuemgr";
interrupts = <17>;
interrupt-names = "glue";
#dma-cells = <2>;
#dma-channels = <30>;
#dma-requests = <256>;
status = "disabled";
};
};
epwmss0: epwmss@48300000 {
compatible = "ti,am33xx-pwmss";
reg = <0x48300000 0x10>;
ti,hwmods = "epwmss0";
#address-cells = <1>;
#size-cells = <1>;
status = "disabled";
ranges = <0x48300100 0x48300100 0x80 /* ECAP */
0x48300180 0x48300180 0x80 /* EQEP */
0x48300200 0x48300200 0x80>; /* EHRPWM */
ecap0: ecap@48300100 {
compatible = "ti,am33xx-ecap";
#pwm-cells = <3>;
reg = <0x48300100 0x80>;
ti,hwmods = "ecap0";
status = "disabled";
};
ehrpwm0: ehrpwm@48300200 {
compatible = "ti,am33xx-ehrpwm";
#pwm-cells = <3>;
reg = <0x48300200 0x80>;
ti,hwmods = "ehrpwm0";
status = "disabled";
};
};
epwmss1: epwmss@48302000 {
compatible = "ti,am33xx-pwmss";
reg = <0x48302000 0x10>;
ti,hwmods = "epwmss1";
#address-cells = <1>;
#size-cells = <1>;
status = "disabled";
ranges = <0x48302100 0x48302100 0x80 /* ECAP */
0x48302180 0x48302180 0x80 /* EQEP */
0x48302200 0x48302200 0x80>; /* EHRPWM */
ecap1: ecap@48302100 {
compatible = "ti,am33xx-ecap";
#pwm-cells = <3>;
reg = <0x48302100 0x80>;
ti,hwmods = "ecap1";
status = "disabled";
};
ehrpwm1: ehrpwm@48302200 {
compatible = "ti,am33xx-ehrpwm";
#pwm-cells = <3>;
reg = <0x48302200 0x80>;
ti,hwmods = "ehrpwm1";
status = "disabled";
};
};
epwmss2: epwmss@48304000 {
compatible = "ti,am33xx-pwmss";
reg = <0x48304000 0x10>;
ti,hwmods = "epwmss2";
#address-cells = <1>;
#size-cells = <1>;
status = "disabled";
ranges = <0x48304100 0x48304100 0x80 /* ECAP */
0x48304180 0x48304180 0x80 /* EQEP */
0x48304200 0x48304200 0x80>; /* EHRPWM */
ecap2: ecap@48304100 {
compatible = "ti,am33xx-ecap";
#pwm-cells = <3>;
reg = <0x48304100 0x80>;
ti,hwmods = "ecap2";
status = "disabled";
};
ehrpwm2: ehrpwm@48304200 {
compatible = "ti,am33xx-ehrpwm";
#pwm-cells = <3>;
reg = <0x48304200 0x80>;
ti,hwmods = "ehrpwm2";
status = "disabled";
};
};
mac: ethernet@4a100000 {
compatible = "ti,cpsw";
ti,hwmods = "cpgmac0";
cpdma_channels = <8>;
ale_entries = <1024>;
bd_ram_size = <0x2000>;
no_bd_ram = <0>;
rx_descs = <64>;
mac_control = <0x20>;
slaves = <2>;
active_slave = <0>;
cpts_clock_mult = <0x80000000>;
cpts_clock_shift = <29>;
reg = <0x4a100000 0x800
0x4a101200 0x100>;
#address-cells = <1>;
#size-cells = <1>;
interrupt-parent = <&intc>;
/*
* c0_rx_thresh_pend
* c0_rx_pend
* c0_tx_pend
* c0_misc_pend
*/
interrupts = <40 41 42 43>;
ranges;
davinci_mdio: mdio@4a101000 {
compatible = "ti,davinci_mdio";
#address-cells = <1>;
#size-cells = <0>;
ti,hwmods = "davinci_mdio";
bus_freq = <1000000>;
reg = <0x4a101000 0x100>;
};
cpsw_emac0: slave@4a100200 {
/* Filled in by U-Boot */
mac-address = [ 00 00 00 00 00 00 ];
};
cpsw_emac1: slave@4a100300 {
/* Filled in by U-Boot */
mac-address = [ 00 00 00 00 00 00 ];
};
};
ocmcram: ocmcram@40300000 {
compatible = "ti,am3352-ocmcram";
reg = <0x40300000 0x10000>;
ti,hwmods = "ocmcram";
};
wkup_m3: wkup_m3@44d00000 {
compatible = "ti,am3353-wkup-m3";
reg = <0x44d00000 0x4000 /* M3 UMEM */
0x44d80000 0x2000>; /* M3 DMEM */
ti,hwmods = "wkup_m3";
};
elm: elm@48080000 {
compatible = "ti,am3352-elm";
reg = <0x48080000 0x2000>;
interrupts = <4>;
ti,hwmods = "elm";
status = "disabled";
};
tscadc: tscadc@44e0d000 {
compatible = "ti,am3359-tscadc";
reg = <0x44e0d000 0x1000>;
interrupt-parent = <&intc>;
interrupts = <16>;
ti,hwmods = "adc_tsc";
status = "disabled";
tsc {
compatible = "ti,am3359-tsc";
};
am335x_adc: adc {
#io-channel-cells = <1>;
compatible = "ti,am3359-adc";
};
};
gpmc: gpmc@50000000 {
compatible = "ti,am3352-gpmc";
ti,hwmods = "gpmc";
reg = <0x50000000 0x2000>;
interrupts = <100>;
gpmc,num-cs = <7>;
gpmc,num-waitpins = <2>;
#address-cells = <2>;
#size-cells = <1>;
status = "disabled";
};
};
};
|