summaryrefslogtreecommitdiffstats
path: root/Documentation/devicetree/bindings/interrupt-controller/ingenic,intc.txt
blob: 5f89fb635a1b3dd409390931571336c9ca9d4137 (plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Ingenic SoC Interrupt Controller

Required properties:

- compatible : should be "ingenic,<socname>-intc". Valid strings are:
    ingenic,jz4740-intc
    ingenic,jz4770-intc
    ingenic,jz4775-intc
    ingenic,jz4780-intc
- reg : Specifies base physical address and size of the registers.
- interrupt-controller : Identifies the node as an interrupt controller
- #interrupt-cells : Specifies the number of cells needed to encode an
  interrupt source. The value shall be 1.
- interrupt-parent : phandle of the CPU interrupt controller.
- interrupts : Specifies the CPU interrupt the controller is connected to.

Example:

intc: interrupt-controller@10001000 {
	compatible = "ingenic,jz4740-intc";
	reg = <0x10001000 0x14>;

	interrupt-controller;
	#interrupt-cells = <1>;

	interrupt-parent = <&cpuintc>;
	interrupts = <2>;
};
OpenPOWER on IntegriCloud