| Commit message (Expand) | Author | Age | Files | Lines | ||
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| | * | | | | | clk: fixed-factor: fix of_node_get-put imbalance | Ricardo Ribalda Delgado | 2018-11-06 | 1 | -0/+1 | |
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| * | | | | | Merge branch 'clk-qcom-8998-resets' into clk-next | Stephen Boyd | 2018-12-14 | 1 | -64/+207 | |
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| | * | | | | | clk: qcom: Drop unused 8998 clock | Jeffrey Hugo | 2018-12-14 | 1 | -14/+0 | |
| | * | | | | | clk: qcom: Leave mmss noc on for 8998 | Jeffrey Hugo | 2018-12-14 | 1 | -0/+6 | |
| | * | | | | | clk: qcom: Add missing msm8998 resets | Jeffrey Hugo | 2018-12-11 | 1 | -0/+2 | |
| | * | | | | | clk: qcom: gcc-msm8998: Add clkref clocks | Bjorn Andersson | 2018-12-05 | 1 | -0/+75 | |
| | * | | | | | clk: qcom: gcc-msm8998: Disable halt check of UFS clocks | Bjorn Andersson | 2018-12-05 | 1 | -3/+3 | |
| | * | | | | | clk: qcom: gcc-msm8998: Drop hmss_dvm and lpass_at | Bjorn Andersson | 2018-12-05 | 1 | -28/+0 | |
| | * | | | | | clk: qcom: Enumerate remaining msm8998 resets | Jeffrey Hugo | 2018-12-05 | 1 | -0/+87 | |
| | * | | | | | clk: qcom: Add xo dummy clk on msm8998 | Stephen Boyd | 2018-12-05 | 1 | -0/+15 | |
| | * | | | | | clk: qcom: Fix MSM8998 resets | Jeffrey Hugo | 2018-12-03 | 1 | -19/+19 | |
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| *-------. \ \ \ \ | Merge branches 'clk-imx7ulp', 'clk-imx6-fixes', 'clk-imx-fixes', 'clk-imx8qxp... | Stephen Boyd | 2018-12-14 | 27 | -27/+3361 | |
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| | | | | | * | | | | clk: imx: Make the i.MX8MQ CCM clock driver CLK_IMX8MQ dependant | Abel Vesa | 2018-12-14 | 3 | -0/+8 | |
| | | | | | * | | | | clk: imx: remove redundant initialization of ret to zero | Colin Ian King | 2018-12-10 | 1 | -1/+1 | |
| | | | | | * | | | | clk: imx: Add SCCG PLL type | Lucas Stach | 2018-12-03 | 3 | -1/+267 | |
| | | | | | * | | | | clk: imx: Add fractional PLL output clock | Lucas Stach | 2018-12-03 | 3 | -0/+236 | |
| | | | | | * | | | | clk: imx: Add clock driver for i.MX8MQ CCM | Abel Vesa | 2018-12-03 | 3 | -0/+626 | |
| | | | | | * | | | | clk: imx: Add imx composite clock | Abel Vesa | 2018-12-03 | 3 | -0/+195 | |
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| | | | | * | | | | clk: imx: add imx8qxp lpcg driver | Aisheng Dong | 2018-12-14 | 3 | -1/+319 | |
| | | | | * | | | | clk: imx: add lpcg clock support | Aisheng Dong | 2018-12-14 | 3 | -1/+121 | |
| | | | | * | | | | clk: imx: add imx8qxp clk driver | Aisheng Dong | 2018-12-14 | 3 | -0/+162 | |
| | | | | * | | | | clk: imx: add scu clock common part | Aisheng Dong | 2018-12-13 | 4 | -0/+292 | |
| | | | | * | | | | clk: imx: add configuration option for mmio clks | Aisheng Dong | 2018-12-13 | 4 | -2/+8 | |
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| | | | * | | | | clk: imx6q: add DCICx clocks gate | Anson Huang | 2018-12-10 | 1 | -0/+2 | |
| | | | * | | | | clk: imx6sl: ensure MMDC CH0 handshake is bypassed | Anson Huang | 2018-12-10 | 1 | -0/+6 | |
| | | | * | | | | clk: imx7d: remove UART1 clock setting | Anson Huang | 2018-11-06 | 1 | -3/+0 | |
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| | | * | | | | clk: imx6q: handle ENET PLL bypass | Lucas Stach | 2018-12-10 | 1 | -6/+57 | |
| | | * | | | | clk: imx6q: optionally get CCM inputs via standard clock handles | Lucas Stach | 2018-12-10 | 1 | -5/+17 | |
| | | * | | | | clk: imx6q: reset exclusive gates on init | Lucas Stach | 2018-12-10 | 1 | -1/+5 | |
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| | * | | | | clk: imx: add imx7ulp clk driver | A.s. Dong | 2018-12-03 | 2 | -0/+221 | |
| | * | | | | clk: imx: implement new clk_hw based APIs | A.s. Dong | 2018-12-03 | 2 | -0/+84 | |
| | * | | | | clk: imx: make mux parent strings const | A.s. Dong | 2018-12-03 | 3 | -9/+13 | |
| | * | | | | clk: imx: add imx7ulp composite clk support | A.s. Dong | 2018-12-03 | 3 | -0/+94 | |
| | * | | | | clk: imx: add pfdv2 support | A.s. Dong | 2018-12-03 | 3 | -1/+208 | |
| | * | | | | clk: imx: add pllv4 support | A.s. Dong | 2018-12-03 | 3 | -0/+188 | |
| | * | | | | clk: fractional-divider: add CLK_FRAC_DIVIDER_ZERO_BASED flag support | A.s. Dong | 2018-12-03 | 1 | -0/+10 | |
| | * | | | | clk: imx: add gatable clock divider support | A.s. Dong | 2018-12-03 | 3 | -0/+226 | |
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| *-------. \ \ \ | Merge branches 'clk-renesas', 'clk-allwinner', 'clk-tegra', 'clk-meson' and '... | Stephen Boyd | 2018-12-14 | 46 | -230/+3116 | |
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| | | | | | * | | | | clk: rockchip: add clock-id to gate of ACODEC for rk3328 | Katsuhiro Suzuki | 2018-11-26 | 1 | -1/+1 | |
| | | | | | * | | | | clk: rockchip: fix I2S1 clock gate register for rk3328 | Katsuhiro Suzuki | 2018-11-19 | 1 | -1/+1 | |
| | | | | | * | | | | clk: rockchip: make rk3188 hclk_vio_bus critical | Mark Yao | 2018-11-15 | 1 | -1/+2 | |
| | | | | | * | | | | clk: rockchip: fix rk3188 sclk_mac_lbtest parameter ordering | Heiko Stuebner | 2018-11-15 | 1 | -2/+2 | |
| | | | | | * | | | | clk: rockchip: fix rk3188 sclk_smc gate data | Finley Xiao | 2018-11-15 | 1 | -2/+2 | |
| | | | | | * | | | | clk: rockchip: fix typo in rk3188 spdif_frac parent | Johan Jonker | 2018-11-12 | 1 | -1/+1 | |
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| | | | | * | | | | Merge tag 'meson-clk-4.21-2' of https://github.com/BayLibre/clk-meson into cl... | Stephen Boyd | 2018-12-13 | 7 | -71/+870 | |
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| | | | | | * | | | | clk: meson: axg-audio: use the clk input helper function | Jerome Brunet | 2018-12-11 | 1 | -59/+24 | |
| | | | | | * | | | | clk: meson: add clk-input helper function | Jerome Brunet | 2018-12-05 | 3 | -0/+50 | |
| | | | | | * | | | | clk: meson: meson8b: add the read-only video clock trees | Martin Blumenstingl | 2018-12-03 | 2 | -10/+782 | |
| | | | | | * | | | | clk: meson: meson8b: add the fractional divider for vid_pll_dco | Martin Blumenstingl | 2018-12-03 | 2 | -0/+6 | |
| | | | | | * | | | | clk: meson: meson8b: fix the offset of vid_pll_dco's N value | Martin Blumenstingl | 2018-12-03 | 1 | -1/+1 | |

