summaryrefslogtreecommitdiffstats
path: root/arch/x86/include/asm/vmx.h
Commit message (Expand)AuthorAgeFilesLines
* KVM: vmx: Add defines for SGX ENCLS exitingSean Christopherson2018-08-221-0/+3
* x86/speculation: Use ARCH_CAPABILITIES to skip L1D flush on vmentryPaolo Bonzini2018-08-051-0/+1
* Merge 4.18-rc7 into master to pick up the KVM dependcyThomas Gleixner2018-08-051-0/+3
|\
| * kvm: vmx: Nested VM-entry prereqs for event inj.Marc Orr2018-06-221-0/+3
* | x86/l1tf: Handle EPT disabled state properThomas Gleixner2018-07-131-0/+1
* | x86/litf: Introduce vmx status variableThomas Gleixner2018-07-131-0/+9
|/
* KVM: nVMX: Restore the VMCS12 offsets for v4.0 fieldsJim Mattson2018-05-231-0/+2
* kvm/x86: fix icebp instruction handlingLinus Torvalds2018-03-201-0/+1
* KVM: VMX: rename RDSEED and RDRAND vmx ctrls to reflect exitingDavid Hildenbrand2017-10-121-2/+2
* KVM: MMU: Add 5 level EPT & Shadow page table support.Yu Zhang2017-08-241-0/+2
* KVM: VMX: cleanup EPTP definitionsDavid Hildenbrand2017-08-181-5/+6
* KVM: nVMX: Emulate EPTP switching for the L1 hypervisorBandan Das2017-08-071-0/+6
* KVM: vmx: Enable VMFUNCsBandan Das2017-08-071-0/+3
* KVM: nVMX: support RDRAND and RDSEED exitingPaolo Bonzini2017-04-071-0/+2
* kvm: nVMX: support EPT accessed/dirty bitsPaolo Bonzini2017-04-071-0/+2
* kvm: x86: mmu: Rename EPT_VIOLATION_READ/WRITE/INSTR constantsJunaid Shahid2017-01-271-6/+6
* kvm: x86: mmu: Lockless access tracking for Intel CPUs without EPT A bits.Junaid Shahid2017-01-091-3/+6
* kvm: x86: mmu: Do not use bit 63 for tracking special SPTEsJunaid Shahid2017-01-091-2/+7
* kvm: x86: mmu: Use symbolic constants for EPT Violation Exit QualificationsJunaid Shahid2017-01-091-0/+16
* KVM: nVMX: support restore of VMX capability MSRsDavid Matlack2016-12-081-0/+31
* KVM: VMX: clean up declaration of VPID/EPT invalidation typesJan Dakinevich2016-11-221-1/+4
* KVM: nVMX: support descriptor table exitsPaolo Bonzini2016-11-021-0/+1
* Revert "KVM: x86: add pcommit support"Dan Williams2016-07-231-1/+0
* KVM: VMX: Enable and initialize VMX TSC scalingHaozhong Zhang2015-11-101-0/+3
* KVM: nVMX: emulate the INVVPID instructionWanpeng Li2015-10-161-0/+1
* KVM: x86: add pcommit supportXiao Guangrong2015-10-011-1/+1
* x86/kvm: Rename VMX's segment access rights definesAndy Lutomirski2015-08-151-23/+23
* kvm/x86: add support for MONITOR_TRAP_FLAGMihai Donțu2015-07-231-0/+1
* KVM: VMX: Add PML support in VMXKai Huang2015-01-301-0/+4
* kvm: x86: handle XSAVES vmcs and vmexitWanpeng Li2014-12-051-0/+2
* kvm: x86: Add kvm_x86_ops hook that enables XSAVES for guestWanpeng Li2014-12-051-0/+1
* KVM: nVMX: Fix returned value of MSR_IA32_VMX_PROCBASED_CTLSJan Kiszka2014-06-191-0/+3
* KVM: x86: Fix constant value of VM_{EXIT_SAVE,ENTRY_LOAD}_DEBUG_CONTROLSJan Kiszka2014-06-191-2/+2
* KVM: x86: Intel MPX vmx and msr handleLiu, Jinsong2014-02-241-0/+4
* KVM: nVMX: Add support for activity state HLTJan Kiszka2013-12-121-0/+1
* nEPT: Nested INVEPTNadav Har'El2013-08-071-0/+2
* KVM: nVMX: Shadow-vmcs control fields/bitsAbel Gordon2013-04-221-0/+3
* KVM: VMX: Check the posted interrupt capabilityYang Zhang2013-04-161-0/+4
* KVM: nVMX: Add preemption timer supportJan Kiszka2013-03-141-0/+3
* KVM: nVMX: Provide EFER.LMA saving supportJan Kiszka2013-03-141-0/+2
* KVM: nVMX: Clean up and fix pin-based execution controlsJan Kiszka2013-03-131-0/+2
* KVM: nVMX: Fix content of MSR_IA32_VMX_ENTRY/EXIT_CTLSJan Kiszka2013-03-071-0/+4
* Merge tag 'kvm-3.9-1' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds2013-02-241-3/+15
|\
| * KVM: VMX: add missing exit names to VMX_EXIT_REASONS arrayGleb Natapov2013-02-051-1/+6
| * x86, apicv: add virtual interrupt delivery supportYang Zhang2013-01-291-0/+11
| * x86, apicv: add virtual x2apic supportYang Zhang2013-01-291-0/+1
| * x86, apicv: add APICv register virtualization supportYang Zhang2013-01-291-0/+2
| * KVM: Rename KVM_MEMORY_SLOTS -> KVM_USER_MEM_SLOTSAlex Williamson2012-12-131-3/+3
* | UAPI: (Scripted) Disintegrate arch/x86/include/asmDavid Howells2012-12-141-86/+3
|/
* kvm: don't use bit24 for detecting address-specific invalidation capabilityZhang Xiantao2012-12-051-2/+1
OpenPOWER on IntegriCloud