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path: root/arch/mips/include/asm/cpu-features.h
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* MIPS: detect presence of the FRE & UFR bitsPaul Burton2014-11-241-0/+4
* MIPS: Use WSBH/DSBH/DSHD on Loongson 3AChen Jie2014-09-221-0/+10
* MIPS: detect presence of MAARsPaul Burton2014-08-021-0/+3
* MIPS: Add new option for unique RI/XI exceptionsLeonid Yegoshin2014-08-021-0/+3
* MIPS: cpu: Add new cpu option for Hardware Table Walker.Markos Chandras2014-08-021-0/+3
* MIPS: Don't use RI/XI with 32-bit kernels on 64-bit CPUsDavid Daney2014-05-301-1/+8
* MIPS: math-emu: Remove most ifdefery.Ralf Baechle2014-05-211-0/+11
* MIPS: asm: cpu: Add cpu flag for Enhanced Virtual AddressingMarkos Chandras2014-03-261-1/+3
* MIPS: Detect the MSA ASEPaul Burton2014-03-261-0/+6
* MIPS: features: Add initial support for Segmentation Control registersSteven J. Hill2014-01-221-0/+4
* MIPS: features: Add initial support for TLBINVF capable coresLeonid Yegoshin2014-01-221-0/+3
* MIPS: cpu-features.h: s/MIPS53/MIPS64/Maciej W. Rozycki2013-09-241-1/+1
* MIPS: Optimize current_cpu_type() for better code.Ralf Baechle2013-09-171-6/+0
* MIPS: oprofile: Fix BUG due to smp_processor_id() in preemptible code.Ralf Baechle2013-08-051-0/+2
* MIPS: Cleanup indentation and whitespaceTony Wu2013-07-011-16/+16
* MIPS: Only set cpu_has_mmips if SYS_SUPPORTS_MICROMIPSDavid Daney2013-07-011-1/+5
* MIPS: Get rid of MIPS I flag and test macros.Ralf Baechle2013-07-011-1/+10
* MIPS: Build uasm-generated code only once to avoid CPU Hotplug problemHuacai Chen2013-05-081-0/+3
* Merge branch 'mips-next-3.9' of git://git.linux-mips.org/pub/scm/john/linux-j...Ralf Baechle2013-02-211-0/+7
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| * MIPS: Probe for and report hardware virtualization support.David Daney2013-02-191-0/+4
| * MIPS: Add support for the M14KEc core.Steven J. Hill2013-02-171-0/+3
* | MIPS: Add printing of ISA version in cpuinfo.Steven J. Hill2013-02-151-0/+13
* | MIPS: Whitespace cleanup.Ralf Baechle2013-02-011-9/+9
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* MIPS: Add detection of DSP ASE Revision 2.Steven J. Hill2012-10-111-0/+4
* MIPS: perf: Add cpu feature bit for PCI (performance counter interrupt)Al Cooper2012-10-111-0/+4
* MIPS: Replace 'kernel_uses_smartmips_rixi' with 'cpu_has_rixi'.Steven J. Hill2012-09-131-3/+0
* MIPS: Add base architecture support for RI and XI.Steven J. Hill2012-09-131-0/+3
* MIPS: Update comment for cpu_has_clo_clzRalf Baechle2010-08-051-1/+2
* MIPS: Implement Read Inhibit/eXecute InhibitDavid Daney2010-02-271-0/+3
* MIPS: 64-bit: Detect virtual memory sizeGuenter Roeck2010-02-021-0/+7
* MIPS: Allow kernel use of LL/SC to be separate from the presence of LL/SC.David Daney2009-09-171-0/+3
* MIPS: Allow CPU specific overriding of CP0 hwrena impl bits.David Daney2009-06-171-0/+4
* MIPS: Allow R2 CPUs to turn off generation of 'ehb' instructions.David Daney2009-06-171-0/+4
* MIPS: Enable CLO / CLZ instructions via separate CPU propertyRalf Baechle2009-05-141-0/+9
* MIPS: Hook Cavium OCTEON cache init into cache.cDavid Daney2009-01-111-0/+3
* MIPS: New feature test macro cpu_has_mips_rRalf Baechle2008-10-301-0/+2
* MIPS: Move headfiles to new location below arch/mips/includeRalf Baechle2008-10-111-0/+219
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