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* pwm: tegra: Drop NUM_PWM macroThierry Reding2016-07-111-5/+3
| | | | | | | This macro is used to initialize the ->npwm field of the PWM chip. Use a literal instead and make all other places rely on ->npwm. Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: lpc32xx: Set PWM_PIN_LEVEL bit to default valueSylvain Lemieux2016-07-111-0/+7
| | | | | | | | | | | | | | | | | | | The PWM_PIN_LEVEL bit is leave unset by the kernel PWM driver. Prior to commit 08ee77b5a5de27ad63c92262ebcb4efe0da93b58, the PWM_PIN_LEVEL bit was always clear when the PWM was disable and a 0 logic level was apply to the output. According to the LPC32x0 User Manual [1], the default value for bit 30 (PWM_PIN_LEVEL) is 0. This change initialize the pin level to 0 (default value) and update the register value accordingly. [1] http://www.nxp.com/documents/user_manual/UM10326.pdf Signed-off-by: Sylvain Lemieux <slemieux@tycoint.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: Add a driver for the STMPE PWMLinus Walleij2016-07-113-0/+327
| | | | | | | | | | | | | | | This adds a driver for the PWM block found in chips of the STMPE 24xx series of multi-purpose I2C expanders. (I think STMPE means ST Microelectronics Multi-Purpose Expander.) This PWM was designed in accordance with Nokia specifications and is kind of weird and usually just switched between max and zero duty cycle. However it is indeed a PWM so it needs to live in the PWM subsystem. This PWM is mostly used for white LED backlight. Cc: Lee Jones <lee.jones@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* dt-bindings: pwm: Add DT bindings for STMPE PWMLinus Walleij2016-07-111-0/+18
| | | | | | | | | | This adds fairly standard device tree bindings for the STMPE PWM found in STMPE24xx multi-purpose expanders. Cc: devicetree@vger.kernel.org Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: rockchip: Add support for atomic updateBoris Brezillon2016-07-111-41/+43
| | | | | | | | | | Implement the ->apply() function to add support for atomic update. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Tested-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Brian Norris <briannorris@chromium.org> Tested-by: Brian Norris <briannorris@chromium.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: rockchip: Avoid glitches on already running PWMsBoris Brezillon2016-07-111-1/+19
| | | | | | | | | | | | | The current logic will disable the PWM clk even if the PWM was left enabled by the bootloader (because it's controlling a critical device like a regulator for example). Keep the PWM clk enabled if the PWM is enabled to avoid any glitches. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Reviewed-by: Brian Norris <briannorris@chromium.org> Tested-by: Brian Norris <briannorris@chromium.org> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: rockchip: Add support for hardware readoutBoris Brezillon2016-07-111-0/+67
| | | | | | | | | | Implement the ->get_state() function to expose initial state. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Reviewed-by: Brian Norris <briannorris@chromium.org> Tested-by: Brian Norris <briannorris@chromium.org> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: rockchip: Fix period and duty cycle approximationBoris Brezillon2016-07-111-4/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The current implementation always round down the duty and period values, while it would be better to round them to the closest integer. These changes are needed in preparation of atomic update support to prevent a period/duty cycle drift when executing several times the 'pwm_get_state() / modify / pwm_apply_state()' sequence. Say you have an expected period of 3.333 us and a clk rate of 112.666667 MHz -- the clock frequency doesn't divide evenly, so the period (stashed in nanoseconds) shrinks when we convert to the register value and back, as follows: pwm_apply_state(): register = period * 112666667 / 1000000000; pwm_get_state(): period = register * 1000000000 / 112666667; or in other words: period = period * 112666667 / 1000000000 * 1000000000 / 112666667; which yields a sequence like: 3333 -> 3328 3328 -> 3319 3319 -> 3310 3310 -> 3301 3301 -> 3292 3292 -> ... (etc) ... With this patch, we'd see instead: period = div_round_closest(period * 112666667, 1000000000) * 1000000000 / 112666667; which yields a stable sequence: 3333 -> 3337 3337 -> 3337 3337 -> ... (etc) ... Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Reviewed-by: Brian Norris <briannorris@chromium.org> Tested-by: Brian Norris <briannorris@chromium.org> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: Add support for Broadcom iProc PWM controllerYendapally Reddy Dhananjaya Reddy2016-07-113-0/+288
| | | | | | | | | Add support for the PWM controller present in Broadcom's iProc family of SoCs. It has been tested on the Northstar+ bcm958625HR board. Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com> [thierry.reding@gmail.com: bunch of coding style fixes, cleanups] Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* dt-bindings: pwm: Add Broadcom iProc PWM controller bindingYendapally Reddy Dhananjaya Reddy2016-07-111-0/+21
| | | | | | | | Add a device tree binding for Broadcom iProc PWM controller. Signed-off-by: Yendapally Reddy Dhananjaya Reddy <yendapally.reddy@broadcom.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: lpss: Move clk_rate check to ->probe()Andy Shevchenko2016-07-111-5/+7
| | | | | | | | There is no need to check each time if the clk_rate defined or not when we call pwm_lpss_config(). Move the check to ->probe() instead. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: lpss: pci: Enable PWM module on Intel EdisonAndy Shevchenko2016-07-111-0/+1
| | | | | | | | Intel Edison has 4 PWM channels on the die with the same IP as in Broxton. Enable it. Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: lpss: Prevent on_time_div overflow on lower frequenciesMika Westerberg2016-07-111-2/+4
| | | | | | | | | | | | | | | | | | If duty_ns is large enough multiplying it by 255 overflows and results wrong duty cycle value being programmed. For example with 10ms duty when period is 20ms (50%) we get 255 * 10000000 / 20000000 = -87 because 255 * 10000000 overlows int. Whereas correct value should be 255 * 10000000 / 20000000 = 127 Fix this by using unsigned long long as type for on_time_div and changing integer literals to use proper type annotation. Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: lpss: Fix base_unit calculation for PWM frequencyDan O'Donovan2016-07-111-5/+3
| | | | | | | | | | | | | | | | The base_unit calculation applies an offset of 0x2 which adds significant error for lower frequencies and doesn't appear to be warranted - rounding the division result gives a correct value. Also, the upper limit check for base_unit is off-by-one; the upper nibble of base_unit is invalid if >=128 according to the Table 88 in the Z8000 Processor Series Datasheet Volume 1 (Rev. 2). Verified on UP Board (Cherry Trail) and Minnowboard Max (Bay Trail). Signed-off-by: Dan O'Donovan <dan@emutex.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: pwm-ti*: Remove support for local clock gatingCooper Jr., Franklin2016-07-114-145/+0
| | | | | | | | | | | | | | | The PWMSS local clock gating registers have no real purpose on OMAP ARM devices. These registers were left over registers from DSP IP where the PRCM doesn't exist. There is a silicon bug where gating and ungating clocks don't function properly. TRMs will be update to indicate that these registers shouldn't be touched. Therefore, all code that accesses the PWMSS_CLKCONFIG or PWMSS_CLKSTATUS will be removed by this patch with zero loss of functionality by the ECAP and EPWM drivers. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: pwm-ti*: Get the clock from the PWMSS parent when using old bindingsCooper Jr., Franklin2016-07-082-0/+18
| | | | | | | | | | | | | When using the old eCAP and ePWM bindings for AM335x and AM437x the clock can be retrieved from the PWMSS parent. Newer bindings will insure that this clock is provided via device tree. Therefore, update this driver to support the newer and older bindings. In the case of the older binding being used give a warning. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> [thierry.reding@gmail.com: rewrite slightly for readability] Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* pwm: pwm-tiehrpwm: Update DT binding document to use generic node nameCooper Jr., Franklin2016-07-081-2/+2
| | | | | | | | | | Now that the node name has been changed from ehrpwm to pwm the document should show this proper usage. Also change the unit address in the example from 0 to the proper physical address value that should be used. Signed-off-by: Franklin S Cooper Jr <fcooper@ti.com> Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
* Linux 4.7-rc1Linus Torvalds2016-05-291-3/+3
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* hash_string: Fix zero-length case for !DCACHE_WORD_ACCESSGeorge Spelvin2016-05-291-2/+2
| | | | | | | | | | The self-test was updated to cover zero-length strings; the function needs to be updated, too. Reported-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: George Spelvin <linux@sciencehorizons.net> Fixes: fcfd2fbf22d2 ("fs/namei.c: Add hashlen_string() function") Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Rename other copy of hash_string to hashlen_stringGeorge Spelvin2016-05-281-2/+2
| | | | | | | | | | | | | | | | The original name was simply hash_string(), but that conflicted with a function with that name in drivers/base/power/trace.c, and I decided that calling it "hashlen_" was better anyway. But you have to do it in two places. [ This caused build errors for architectures that don't define CONFIG_DCACHE_WORD_ACCESS - Linus ] Signed-off-by: George Spelvin <linux@sciencehorizons.net> Reported-by: Guenter Roeck <linux@roeck-us.net> Fixes: fcfd2fbf22d2 ("fs/namei.c: Add hashlen_string() function") Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* hpfs: implement the show_options methodMikulas Patocka2016-05-281-11/+32
| | | | | | | | | | | | | | | | The HPFS filesystem used generic_show_options to produce string that is displayed in /proc/mounts. However, there is a problem that the options may disappear after remount. If we mount the filesystem with option1 and then remount it with option2, /proc/mounts should show both option1 and option2, however it only shows option2 because the whole option string is replaced with replace_mount_options in hpfs_remount_fs. To fix this bug, implement the hpfs_show_options function that prints options that are currently selected. Signed-off-by: Mikulas Patocka <mpatocka@redhat.com> Cc: stable@vger.kernel.org Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* affs: fix remount failure when there are no options changedMikulas Patocka2016-05-281-2/+3
| | | | | | | | | | | | | | | | | | | | | | Commit c8f33d0bec99 ("affs: kstrdup() memory handling") checks if the kstrdup function returns NULL due to out-of-memory condition. However, if we are remounting a filesystem with no change to filesystem-specific options, the parameter data is NULL. In this case, kstrdup returns NULL (because it was passed NULL parameter), although no out of memory condition exists. The mount syscall then fails with ENOMEM. This patch fixes the bug. We fail with ENOMEM only if data is non-NULL. The patch also changes the call to replace_mount_options - if we didn't pass any filesystem-specific options, we don't call replace_mount_options (thus we don't erase existing reported options). Fixes: c8f33d0bec99 ("affs: kstrdup() memory handling") Signed-off-by: Mikulas Patocka <mpatocka@redhat.com> Cc: stable@vger.kernel.org # v4.1+ Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* hpfs: fix remount failure when there are no options changedMikulas Patocka2016-05-281-2/+3
| | | | | | | | | | | | | | | | | | | | | | Commit ce657611baf9 ("hpfs: kstrdup() out of memory handling") checks if the kstrdup function returns NULL due to out-of-memory condition. However, if we are remounting a filesystem with no change to filesystem-specific options, the parameter data is NULL. In this case, kstrdup returns NULL (because it was passed NULL parameter), although no out of memory condition exists. The mount syscall then fails with ENOMEM. This patch fixes the bug. We fail with ENOMEM only if data is non-NULL. The patch also changes the call to replace_mount_options - if we didn't pass any filesystem-specific options, we don't call replace_mount_options (thus we don't erase existing reported options). Fixes: ce657611baf9 ("hpfs: kstrdup() out of memory handling") Signed-off-by: Mikulas Patocka <mpatocka@redhat.com> Cc: stable@vger.kernel.org Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
* Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2016-05-2867-258/+373
|\ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Pull more MIPS updates from Ralf Baechle: "This is the secondnd batch of MIPS patches for 4.7. Summary: CPS: - Copy EVA configuration when starting secondary VPs. EIC: - Clear Status IPL. Lasat: - Fix a few off by one bugs. lib: - Mark intrinsics notrace. Not only are the intrinsics uninteresting, it would cause infinite recursion. MAINTAINERS: - Add file patterns for MIPS BRCM device tree bindings. - Add file patterns for mips device tree bindings. MT7628: - Fix MT7628 pinmux typos. - wled_an pinmux gpio. - EPHY LEDs pinmux support. Pistachio: - Enable KASLR VDSO: - Build microMIPS VDSO for microMIPS kernels. - Fix aliasing warning by building with `-fno-strict-aliasing' for debugging but also tracing them might result in recursion. Misc: - Add missing FROZEN hotplug notifier transitions. - Fix clk binding example for varioius PIC32 devices. - Fix cpu interrupt controller node-names in the DT files. - Fix XPA CPU feature separation. - Fix write_gc0_* macros when writing zero. - Add inline asm encoding helpers. - Add missing VZ accessor microMIPS encodings. - Fix little endian microMIPS MSA encodings. - Add 64-bit HTW fields and fix its configuration. - Fix sigreturn via VDSO on microMIPS kernel. - Lots of typo fixes. - Add definitions of SegCtl registers and use them" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (49 commits) MIPS: Add missing FROZEN hotplug notifier transitions MIPS: Build microMIPS VDSO for microMIPS kernels MIPS: Fix sigreturn via VDSO on microMIPS kernel MIPS: devicetree: fix cpu interrupt controller node-names MIPS: VDSO: Build with `-fno-strict-aliasing' MIPS: Pistachio: Enable KASLR MIPS: lib: Mark intrinsics notrace MIPS: Fix 64-bit HTW configuration MIPS: Add 64-bit HTW fields MAINTAINERS: Add file patterns for mips device tree bindings MAINTAINERS: Add file patterns for mips brcm device tree bindings MIPS: Simplify DSP instruction encoding macros MIPS: Add missing tlbinvf/XPA microMIPS encodings MIPS: Fix little endian microMIPS MSA encodings MIPS: Add missing VZ accessor microMIPS encodings MIPS: Add inline asm encoding helpers MIPS: Spelling fix lets -> let's MIPS: VR41xx: Fix typo MIPS: oprofile: Fix typo MIPS: math-emu: Fix typo ...
| * MIPS: Add missing FROZEN hotplug notifier transitionsAnna-Maria Gleixner2016-05-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | The corresponding FROZEN hotplug notifier transitions used on suspend/resume are ignored. Therefore the switch case action argument is masked with the frozen hotplug notifier transition mask. Signed-off-by: Anna-Maria Gleixner <anna-maria@linutronix.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: rt@linutronix.de Patchwork: https://patchwork.linux-mips.org/patch/13351/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Build microMIPS VDSO for microMIPS kernelsJames Hogan2016-05-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | MicroMIPS kernels may be expected to run on microMIPS only cores which don't support the normal MIPS instruction set, so be sure to pass the -mmicromips flag through to the VDSO cflags. Fixes: ebb5e78cc634 ("MIPS: Initial implementation of a VDSO") Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: <stable@vger.kernel.org> # 4.4.x- Patchwork: https://patchwork.linux-mips.org/patch/13349/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Fix sigreturn via VDSO on microMIPS kernelJames Hogan2016-05-281-8/+0
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In microMIPS kernels, handle_signal() sets the isa16 mode bit in the vdso address so that the sigreturn trampolines (which are offset from the VDSO) get executed as microMIPS. However commit ebb5e78cc634 ("MIPS: Initial implementation of a VDSO") changed the offsets to come from the VDSO image, which already have the isa16 mode bit set correctly since they're extracted from the VDSO shared library symbol table. Drop the isa16 mode bit handling from handle_signal() to fix sigreturn for cores which support both microMIPS and normal MIPS. This doesn't fix microMIPS only cores, since the VDSO is still built for normal MIPS, but thats a separate problem. Fixes: ebb5e78cc634 ("MIPS: Initial implementation of a VDSO") Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Cc: <stable@vger.kernel.org> # 4.4.x- Patchwork: https://patchwork.linux-mips.org/patch/13348/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: devicetree: fix cpu interrupt controller node-namesAntony Pavlov2016-05-287-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Here is the quote from [1]: The unit-address must match the first address specified in the reg property of the node. If the node has no reg property, the @ and unit-address must be omitted and the node-name alone differentiates the node from other nodes at the same level This patch adjusts MIPS dts-files and devicetree binding documentation in accordance with [1]. [1] Power.org(tm) Standard for Embedded Power Architecture(tm) Platform Requirements (ePAPR). Version 1.1 – 08 April 2011. Chapter 2.2.1.1 Node Name Requirements Signed-off-by: Antony Pavlov <antonynpavlov@gmail.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Zubair Lutfullah Kakakhel <Zubair.Kakakhel@imgtec.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13345/ Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: VDSO: Build with `-fno-strict-aliasing'Maciej W. Rozycki2016-05-281-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Avoid an aliasing issue causing a build error in VDSO: In file included from include/linux/srcu.h:34:0, from include/linux/notifier.h:15, from ./arch/mips/include/asm/uprobes.h:9, from include/linux/uprobes.h:61, from include/linux/mm_types.h:13, from ./arch/mips/include/asm/vdso.h:14, from arch/mips/vdso/vdso.h:27, from arch/mips/vdso/gettimeofday.c:11: include/linux/workqueue.h: In function 'work_static': include/linux/workqueue.h:186:2: error: dereferencing type-punned pointer will break strict-aliasing rules [-Werror=strict-aliasing] return *work_data_bits(work) & WORK_STRUCT_STATIC; ^ cc1: all warnings being treated as errors make[2]: *** [arch/mips/vdso/gettimeofday.o] Error 1 with a CONFIG_DEBUG_OBJECTS_WORK configuration and GCC 5.2.0. Include `-fno-strict-aliasing' along with compiler options used, as required for kernel code, fixing a problem present since the introduction of VDSO with commit ebb5e78cc634 ("MIPS: Initial implementation of a VDSO"). Thanks to Tejun for diagnosing this properly! Signed-off-by: Maciej W. Rozycki <macro@imgtec.com> Reviewed-by: James Hogan <james.hogan@imgtec.com> Fixes: ebb5e78cc634 ("MIPS: Initial implementation of a VDSO") Cc: Tejun Heo <tj@kernel.org> Cc: linux-mips@linux-mips.org Cc: stable@vger.kernel.org # v4.3+ Patchwork: https://patchwork.linux-mips.org/patch/13357/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Pistachio: Enable KASLRMatt Redfearn2016-05-282-2/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Allow KASLR to be selected on Pistachio based systems. Tested on a Creator Ci40. Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com> Reviewed-by: James Hogan <james.hogan@imgtec.com> Cc: Andrew Bresticker <abrestic@chromium.org> Cc: Jonas Gorski <jogo@openwrt.org> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13356/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: lib: Mark intrinsics notraceHarvey Hunt2016-05-287-7/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On certain MIPS32 devices, the ftrace tracer "function_graph" uses __lshrdi3() during the capturing of trace data. ftrace then attempts to trace __lshrdi3() which leads to infinite recursion and a stack overflow. Fix this by marking __lshrdi3() as notrace. Mark the other compiler intrinsics as notrace in case the compiler decides to use them in the ftrace path. Signed-off-by: Harvey Hunt <harvey.hunt@imgtec.com> Cc: <linux-mips@linux-mips.org> Cc: <linux-kernel@vger.kernel.org> Cc: <stable@vger.kernel.org> # 4.2.x- Patchwork: https://patchwork.linux-mips.org/patch/13354/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Fix 64-bit HTW configurationJames Hogan2016-05-281-2/+12
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The Hardware page Table Walker (HTW) is being misconfigured on 64-bit kernels. The PWSize.PS (pointer size) bit determines whether pointers within directories are loaded as 32-bit or 64-bit addresses, but was never being set to 1 for 64-bit kernels where the unsigned long in pgd_t is 64-bits wide. This actually reduces rather than improves performance when the HTW is enabled on P6600 since the HTW is initiated lots, but walks are all aborted due I think to bad intermediate pointers. Since we were already taking the width of the PTEs into account by setting PWSize.PTEW, which is the left shift applied to the page table index *in addition to* the native pointer size, we also need to reduce PTEW by 1 when PS=1. This is done by calculating PTEW based on the relative size of pte_t compared to pgd_t. Finally in order for the HTW to be used when PS=1, the appropriate XK/XS/XU bits corresponding to the different 64-bit segments need to be set in PWCtl. We enable only XU for now to enable walking for XUSeg. Supporting walking for XKSeg would be a bit more involved so is left for a future patch. It would either require the use of a per-CPU top level base directory if supported by the HTW (a bit like pgd_current but with a second entry pointing at swapper_pg_dir), or the HTW would prepend bit 63 of the address to the global directory index which doesn't really match how we split user and kernel page directories. Fixes: cab25bc7537b ("MIPS: Extend hardware table walking support to MIPS64") Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13364/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Add 64-bit HTW fieldsJames Hogan2016-05-282-2/+14
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Add field definitions for some of the 64-bit specific Hardware page Table Walker (HTW) register fields in PWSize and PWCtl, in preparation for fixing the 64-bit HTW configuration. Also print these fields out along with the others in print_htw_config(). Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13363/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MAINTAINERS: Add file patterns for mips device tree bindingsGeert Uytterhoeven2016-05-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | Submitters of device tree binding documentation may forget to CC the subsystem maintainer if this is missing. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13340/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MAINTAINERS: Add file patterns for mips brcm device tree bindingsGeert Uytterhoeven2016-05-281-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Submitters of device tree binding documentation may forget to CC the subsystem maintainer if this is missing. Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Cc: Hauke Mehrtens <hauke@hauke-m.de> Cc: Rafał Miłecki <zajec5@gmail.com> Cc: linux-mips@linux-mips.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13339/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Simplify DSP instruction encoding macrosJames Hogan2016-05-281-90/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Simplify the DSP instruction wrapper macros which use explicit encodings for microMIPS and normal MIPS by using the new encoding macros and removing duplication. To me this makes it easier to read since it is much shorter, but it also ensures .insn is used, preventing objdump disassembling the microMIPS code as normal MIPS. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13314/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Add missing tlbinvf/XPA microMIPS encodingsJames Hogan2016-05-281-5/+7
| | | | | | | | | | | | | | | | | | | | | | | | | | Hardcoded MIPS instruction encodings are provided for tlbinvf, mfhc0 & mthc0 instructions, but microMIPS encodings are missing. I doubt any microMIPS cores exist at present which support these instructions, but the microMIPS encodings exist, and microMIPS cores may support them in the future. Add the missing microMIPS encodings using the new macros. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13313/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Fix little endian microMIPS MSA encodingsJames Hogan2016-05-282-62/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When the toolchain doesn't support MSA we encode MSA instructions explicitly in assembly. Unfortunately we use .word for both MIPS and microMIPS encodings which is wrong, since 32-bit microMIPS instructions are made up from a pair of halfwords. - The most significant halfword always comes first, so for little endian builds the halves will be emitted in the wrong order. - 32-bit alignment isn't guaranteed, so the assembler may insert a 16-bit nop instruction to pad the instruction stream to a 32-bit boundary. Use the new instruction encoding macros to encode microMIPS MSA instructions correctly. Fixes: d96cc3d1ec5d ("MIPS: Add microMIPS MSA support.") Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paul Burton <Paul.Burton@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13312/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Add missing VZ accessor microMIPS encodingsJames Hogan2016-05-281-9/+18
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Toolchains may be used which support microMIPS but not VZ instructions (i.e. binutis 2.22 & 2.23), so extend the explicitly encoded versions of the guest COP0 register & guest TLB access macros to support microMIPS encodings too, using the new macros. This prevents non-microMIPS instructions being executed in microMIPS mode during CPU probe on cores supporting VZ (e.g. M5150), which cause reserved instruction exceptions early during boot. Fixes: bad50d79255a ("MIPS: Fix VZ probe gas errors with binutils <2.24") Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13311/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Add inline asm encoding helpersJames Hogan2016-05-281-0/+27
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | To allow simplification of macros which use inline assembly to explicitly encode instructions, add a few simple abstractions to mipsregs.h which expand to specific microMIPS or normal MIPS encodings depending on what type of kernel is being built: _ASM_INSN_IF_MIPS(_enc) : Emit a 32bit MIPS instruction if microMIPS is not enabled. _ASM_INSN32_IF_MM(_enc) : Emit a 32bit microMIPS instruction if enabled. _ASM_INSN16_IF_MM(_enc) : Emit a 16bit microMIPS instruction if enabled. The macros can be used one after another since the MIPS / microMIPS macros are mutually exclusive, for example: __asm__ __volatile__( ".set push\n\t" ".set noat\n\t" "# mfgc0 $1, $%1, %2\n\t" _ASM_INSN_IF_MIPS(0x40610000 | %1 << 11 | %2) _ASM_INSN32_IF_MM(0x002004fc | %1 << 16 | %2 << 11) "move %0, $1\n\t" ".set pop" : "=r" (__res) : "i" (source), "i" (sel)); Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13310/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Spelling fix lets -> let'sRalf Baechle2016-05-289-10/+10
| | | | | | | | | | | | | | As noticed by Sergei in the discussion of Andrea Gelmini's patch series. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Reported-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
| * MIPS: VR41xx: Fix typoAndrea Gelmini2016-05-281-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: trivial@kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13338/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: oprofile: Fix typoAndrea Gelmini2016-05-281-1/+1
| | | | | | | | | | | | | | | | | | | | Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: rric@kernel.org Cc: linux-mips@linux-mips.org Cc: trivial@kernel.org Cc: oprofile-list@lists.sf.net Patchwork: https://patchwork.linux-mips.org/patch/13334/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: math-emu: Fix typoAndrea Gelmini2016-05-281-2/+2
| | | | | | | | | | | | | | | | | | Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: macro@imgtec.com Cc: trivial@kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13333/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: lib: Fix typoAndrea Gelmini2016-05-281-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: trivial@kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13331/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: kernel: Fix typoAndrea Gelmini2016-05-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: paul.burton@imgtec.com Cc: macro@imgtec.com Cc: james.hogan@imgtec.com Cc: jslaby@suse.cz Cc: adam.buchbinder@gmail.com Cc: trivial@kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13330/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: R6: Fix typoAndrea Gelmini2016-05-281-1/+1
| | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: macro@imgtec.com Cc: paul.burton@imgtec.com Cc: Leonid.Yegoshin@imgtec.com Cc: trivial@kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13329/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: IP22/IP28: Fix typoAndrea Gelmini2016-05-281-1/+1
| | | | | | | | | | | | | | | | | | Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: adam.buchbinder@gmail.com Cc: trivial@kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13328/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: Cavium: Fix typoAndrea Gelmini2016-05-284-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: david.daney@cavium.com Cc: janne.huttunen@nokia.com Cc: aaro.koskinen@nokia.com Cc: trivial@kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13324/ Patchwork: https://patchwork.linux-mips.org/patch/13325/ Patchwork: https://patchwork.linux-mips.org/patch/13326/ Patchwork: https://patchwork.linux-mips.org/patch/13327/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
| * MIPS: MT: Fix typoAndrea Gelmini2016-05-281-1/+1
| | | | | | | | | | | | | | | | Signed-off-by: Andrea Gelmini <andrea.gelmini@gelma.net> Cc: linux-mips@linux-mips.org Cc: trivial@kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13323/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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