summaryrefslogtreecommitdiffstats
Commit message (Collapse)AuthorAgeFilesLines
* powerpc/fsl-booke: add the reg prop for pci bridge device node for T4/B4Kevin Hao2013-04-292-0/+5
| | | | | | | | | | | The reg property in the pci bridge device node is used to bind this device node to the pci bridge device. Then all the pci devices under this bridge could use the interrupt maps defined in this device node to do the irq translation. So if this property is missed, the pci traditional irq mechanism will not work. Signed-off-by: Kevin Hao <haokexin@gmail.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/fsl-pci: don't unmap the PCI SoC controller registers in setup_pci_atmuKevin Hao2013-04-291-5/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | In patch 34642bbb (powerpc/fsl-pci: Keep PCI SoC controller registers in pci_controller) we choose to keep the map of the PCI SoC controller registers. But we missed to delete the unmap in setup_pci_atmu function. This will cause the following call trace once we access the PCI SoC controller registers later. Unable to handle kernel paging request for data at address 0x8000080080040f14 Faulting instruction address: 0xc00000000002ea58 Oops: Kernel access of bad area, sig: 11 [#1] SMP NR_CPUS=24 T4240 QDS Modules linked in: NIP: c00000000002ea58 LR: c00000000002eaf4 CTR: c00000000002eac0 REGS: c00000017e10b4a0 TRAP: 0300 Not tainted (3.9.0-rc1-00052-gfa3529f-dirty) MSR: 0000000080029000 <CE,EE,ME> CR: 28adbe22 XER: 00000000 SOFTE: 0 DEAR: 8000080080040f14, ESR: 0000000000000000 TASK = c00000017e100000[1] 'swapper/0' THREAD: c00000017e108000 CPU: 2 GPR00: 0000000000000000 c00000017e10b720 c0000000009928d8 c00000017e578e00 GPR04: 0000000000000000 000000000000000c 0000000000000001 c00000017e10bb40 GPR08: 0000000000000000 8000080080040000 0000000000000000 0000000000000016 GPR12: 0000000088adbe22 c00000000fffa800 c000000000001ba0 0000000000000000 GPR16: 0000000000000000 0000000000000000 0000000000000000 0000000000000000 GPR20: 0000000000000000 0000000000000000 0000000000000000 c0000000008a5b70 GPR24: c0000000008af938 c0000000009a28d8 c0000000009bb5dc c00000017e10bb40 GPR28: c00000017e32a400 c00000017e10bc00 c00000017e32a400 c00000017e578e00 NIP [c00000000002ea58] .fsl_pcie_check_link+0x88/0xf0 LR [c00000000002eaf4] .fsl_indirect_read_config+0x34/0xb0 Call Trace: [c00000017e10b720] [c00000017e10b7a0] 0xc00000017e10b7a0 (unreliable) [c00000017e10ba30] [c00000000002eaf4] .fsl_indirect_read_config+0x34/0xb0 [c00000017e10bad0] [c00000000033aa08] .pci_bus_read_config_byte+0x88/0xd0 [c00000017e10bb90] [c00000000088d708] .pci_apply_final_quirks+0x9c/0x18c [c00000017e10bc40] [c0000000000013dc] .do_one_initcall+0x5c/0x1f0 [c00000017e10bcf0] [c00000000086ebac] .kernel_init_freeable+0x180/0x26c [c00000017e10bdb0] [c000000000001bbc] .kernel_init+0x1c/0x460 [c00000017e10be30] [c000000000000880] .ret_from_kernel_thread+0x64/0xe4 Instruction dump: 38210310 2b800015 4fdde842 7c600026 5463fffe e8010010 7c0803a6 4e800020 60000000 60000000 e92301d0 7c0004ac <80690f14> 0c030000 4c00012c 38210310 ---[ end trace 7a8fe0cbccb7d992 ]--- Kernel panic - not syncing: Attempted to kill init! exitcode=0x0000000b Signed-off-by: Kevin Hao <haokexin@gmail.com> Acked-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/dts: Fix the dts for p1025rdb 36bitZhicheng Fan2013-04-291-0/+5
| | | | | | | | | | | Fix the following errors: Error: p1025rdb.dtsi:326.2-3 label or path, 'qe', not found Error: p1021si-post.dtsi:242.2-3 label or path, 'qe', not found FATAL ERROR: Syntax error parsing input tree Signed-off-by: Zhicheng Fan <B32736@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Fix MPC8536DS 36-bit device treeKumar Gala2013-04-111-3/+3
| | | | | | | | | | The localbus node should be in at 0xfffe05000 not 0xffe05000. Also fixed the names of the localbus and pci nodes to reflect the addresses they are actually at. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> Signed-off-by: Kim Phillips <kim.phillips@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: enable Silicon image 3132 PCIe to SATA controllerRoy ZANG2013-04-112-0/+2
| | | | | | | | | | | Some 85xx board, for example, P1020RDB-PC has on board silicon image PCIe to SATA controller and when booting up, the filesystem will auto mount to the SATA disk. So enable silicon image 3132 pcie to sata controller by default Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/fsl: Add property for 'era' in SEC dts crypto nodeVakul Garg2013-04-117-0/+7
| | | | | | | | | The crypto node now contains a new property 'fsl,sec-era'. This is required so that applications can retrieve era info without having to be able to read SEC's register space. Signed-off-by: Vakul Garg <vakul@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/fsl: removed qoriq-sec4.1-0.dtsi.Vakul Garg2013-04-111-109/+0
| | | | | | | Removing qoriq-sec4.1-0.dtsi as it is not used by any soc anymore. Signed-off-by: Vakul Garg <vakul@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Update corenet64_smp_defconfig for B4_QDSShaveta Leekha2013-04-101-0/+1
| | | | | Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/fsl-booke: Add B4_QDS board supportShaveta Leekha2013-04-103-0/+120
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | - Add support for B4 board in board file b4_qds.c, It is common for B4860, B4420 and B4220QDS as they share same QDS board - Add B4QDS support in Kconfig and Makefile B4860QDS is a high-performance computing evaluation, development and test platform supporting the B4860 QorIQ Power Architecture processor, with following major features: - Four dual-threaded e6500 Power Architecture processors organized in one cluster-each core runs up to 1.8 GHz - Two DDR3/3L controllers for high-speed memory interface each runs at up to 1866.67 MHz - CoreNet fabric that fully supports coherency using MESI protocol between the e6500 cores, SC3900 FVP cores, memories and external interfaces. - Data Path Acceleration Architecture having FMAN, QMan, BMan, SEC 5.3 and RMAN - Large internal cache memory with snooping and stashing capabilities - Sixteen 10-GHz SerDes lanes that serve: - Two SRIO interfaces. Each supports up to 4 lanes and a total of up to 8 lanes - Up to 8-lanes Common Public Radio Interface (CPRI) controller for glue-less antenna connection - Two 10-Gbit Ethernet controllers (10GEC) - Six 1G/2.5-Gbit Ethernet controllers for network communications - PCI Express controller - Debug (Aurora) - Various system peripherals B4420 and B4220 have some differences in comparison to B4860 with fewer core/clusters(both SC3900 and e6500), fewer DDR controllers, fewer serdes lanes, fewer SGMII interfaces and reduced target frequencies. Key differences between B4860 and B4420: B4420 has: - Fewer e6500 cores: 1 cluster with 2 e6500 cores - Fewer SC3900 cores/clusters: 1 cluster with 2 SC3900 cores per cluster - Single DDRC @ 1.6GHz - 2 X 4 lane serdes - 3 SGMII interfaces - no sRIO - no 10G Key differences between B4860 and B4220: B4220 has: - Fewer e6500 cores: 1 cluster with 1 e6500 core - Fewer SC3900 cores/clusters: 1 cluster with 2 SC3900 cores per cluster - Single DDRC @ 1.33GHz - 2 X 2 lane serdes - 2 SGMII interfaces - no sRIO - no 10G Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/fsl-booke: Add initial B4860QDS and B4420QDS board device treeShaveta Leekha2013-04-103-0/+280
| | | | | | | | | | | | | | B4860QDS and B4420QDS share same QDS board * common board features have been added in b4qds.dts * various board differences are in respective files of B4860 and B4420 Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Poonam Aggrwal <poonam.aggrwal@freescale.com> Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/fsl-booke: Add initial silicon device tree files for B4860 and B4420Shaveta Leekha2013-04-105-0/+663
| | | | | | | | | | | | | | | | | | | | | | | | | B4860 and B4420 are similar that share some commonalities * common features have been added in b4si-pre.dtsi and b4si-post.dtsi * differences are added in respective silicon files of B4860 and B4420 There are several things missing from the device trees of B4860 and B4420: * DPAA related nodes (Qman, Bman, Fman, Rman) * DSP related nodes/information * serdes, sfp(security fuse processor), thermal, gpio, maple, cpri, quad timers nodes Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: Varun Sethi <Varun.Sethi@freescale.com> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Vakul Garg <vakul@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/fsl-pci Make PCIe hotplug work with Freescale PCIe controllersRojhalat Ibrahim2013-04-103-13/+54
| | | | | | | | | | Up to now the PCIe link status on Freescale PCIe controllers was only checked once at boot time. So hotplug did not work. With this patch the link status is checked on every config read. PCIe devices not present at boot time are found after doing 'echo 1 >/sys/bus/pci/rescan'. Signed-off-by: Rojhalat Ibrahim <imr@rtschenk.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/fsl-pci: Keep PCI SoC controller registers in pci_controllerKumar Gala2013-04-102-40/+34
| | | | | | | | | Move to keeping the SoC registers that control and config the PCI controllers on FSL SoCs in the pci_controller struct. This allows us to not need to ioremap() the registers in multiple different places that use them. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc: remove "config MPC10X_OPENPIC"Paul Bolle2013-04-101-5/+0
| | | | | | | | The last users of Kconfig symbol MPC10X_OPENPIC were removed in v2.6.27. Its Kconfig entry can be removed now. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/fsl-booke: Minor fixes to T4240 Si device treeKumar Gala2013-04-092-13/+13
| | | | | | | * Fix cpu unit address to match reg * Update compatible for rcpm & clockgen to be 2.0 instead of 2 Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: fix a bug with the parameter of mpic_reset_core()Chen-Hui Zhao2013-04-031-1/+1
| | | | | | | | mpic_reset_core() need a logical cpu number instead of physical. Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/fsl-msi: use a different lockclass for the cascade interruptSebastian Andrzej Siewior2013-04-031-1/+3
| | | | | | | | | lockdep thinks that it might deadlock because it grabs a lock of the same class while calling the generic_irq_handler(). This annotation will inform lockdep that it will not. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: add SEC-5.3 device treeShaveta Leekha2013-04-031-0/+118
| | | | | | Signed-off-by: Vakul Garg <vakul@freescale.com> Signed-off-by: Shaveta Leekha <shaveta@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/fsl_pci: fix 64 bit pci size issueRoy Zang2013-04-031-5/+5
| | | | | | | | | | The size might be 64 bit, so use ilog2() instead of __ilog2() or __ilog2_u64(). ilog2() can select 32bit or 64bit function automatically. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: sgy-cts1000 - Remove __dev* attributesBen Collins2013-04-031-3/+3
| | | | | | | Somehow the driver snuck in with these still in it. Signed-off-by: Ben Collins <ben.c@servergy.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/fsl-booke: Update T4240 device config node in device treeKumar Gala2013-03-181-1/+1
| | | | | | | As the T4240 is based on corenet chassis v2.0 spec we update the global utilities (GUTS) device config compatiable to reflect this. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/fsl-booke: Update DCSR EPU device tree entries for existing SoCsStephen George2013-03-185-5/+5
| | | | | | | Identifies the epu as compatible with Chassis v1 Debug IP. Signed-off-by: Stephen George <Stephen.George@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/fsl-booke: Added device tree DCSR entries for T4240 Chassis v2 Debug IPStephen George2013-03-183-12/+148
| | | | | Signed-off-by: Stephen George <Stephen.George@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc: add CONFIG(s) require for using flash controllerPrabhakar Kushwaha2013-03-183-1/+96
| | | | | | | | | | Add CONFIG(s) required for NAND and NOR flash controller usage. It defines MTD, Jffs2 and UBIFS file system required for controllers. It also enables IFC controller Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/qe: Fix Kconfig enablement of QE_USB supportKumar Gala2013-03-151-1/+1
| | | | | | | | Commit 193ab2a6070039e7ee2b9b9bebea754a7c52fd1b changed the USB gadget Kconfig symbol from USB_GADGET_FSL_QE to USB_FSL_QE, but did not update the associated symbol name in qe_lib to match. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Add platform_device declaration to fsl_pci.hJia Hongtao2013-03-151-0/+2
| | | | | | | | | mpc85xx_pci_err_probe(struct platform_device *op) need platform_device declaration for definition. Otherwise, it will cause compile error if any files including fsl_pci.h without declaration of platform_device. Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc: remove "config 8260_PCI9"Paul Bolle2013-03-151-5/+0
| | | | | | | | The last user of Kconfig symbol 8260_PCI9 got removed in release v3.2. Remove this symbol too. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: enable E1000 NIC to mpc85xx_defconfigRoy Zang2013-03-151-4/+4
| | | | | | | | | | | E1000 NIC is a common used Ethernet card. Enable it as default for mpc85xx platform. other change is due to make savedefconfig Reported-by: Fu Jiwei <b36666@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc: Add paravirt idle loop for 64-bit Book-EStuart Yoder2013-03-132-2/+32
| | | | | Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: add CONFIG_E1000E to corenet64_smp_defconfigScott Wood2013-03-121-0/+1
| | | | | | | | This is a commonly used ethernet card, especially with mainline kernels which lack datapath support. Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/fsl: remove the PPC_CLOCK dependencyTang Yuantian2013-03-122-2/+0
| | | | | | | | | | | Config FSL_SOC does not depend on PPC_CLOCK anymore since the following commit got merged: 93abe8e (clk: add non CONFIG_HAVE_CLK routines) Config CPM does not use PPC_CLOCK either currently. So remove them. PPC_CLOCK also keeps Freescale PowerPC archtecture from supporting COMMON_CLK. Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Reserve a partition of NOR flash for QE ucode firmwareJiucheng Xu2013-03-121-2/+10
| | | | | | | | | Due to the partition of JFFS2 overlaps with QE ucode firmware, So JFFS2 will break QE ucode. Shrink JFFS2's partition to reserve the space of QE ucode firmware. Signed-off-by: Jiucheng Xu <Jiucheng.Xu@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Add first usb controller node for Qonverge platformsRamneek Mehresh2013-03-121-0/+41
| | | | | | | | Add first usb controller node for qonverge qoriq platforms like B4860, etc Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Update corenet64_smp_defconfig for T4240Kumar Gala2013-03-121-5/+4
| | | | | | | | | * Add support for up to 24 cores on T4240 (includes threads) * Enable AltiVec support (on T4240) * Add T4240QDS board into build * Other changes are due to general kernel update of defconfig Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/fsl-booke: Add initial T4240QDS board supportKumar Gala2013-03-124-1/+120
| | | | | | | | | | Some minor changes to the common corenet_ds.c code are needed to support the T4240QDS: * Add support for "fsl,qoriq-pcie-v3.0" controller * Bump max # of IRQs to 512 (T4240 supports more interrupts than previous SoCs). Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/fsl-booke: Add initial T4240QDS board device treeKumar Gala2013-03-121-0/+220
| | | | | | | | | | | Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/fsl-booke: Add initial silicon device tree for T4240Kumar Gala2013-03-125-0/+557
| | | | | | | | | | | | | | | | | | | | | | | | | Enable a baseline T4240 SoC to boot. There are several things missing from the device trees for T4240: * Proper PAMU topology information * DPAA related nodes (Qman, Bman, Fman, Rman, DCE) * Prefetch Manager * Thermal monitor unit * Interlaken Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Minghuan Lian <Minghuan.Lian@freescale.com> Signed-off-by: Haiying Wang <Haiying.Wang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com> Signed-off-by: York Sun <yorksun@freescale.com> Signed-off-by: Vakul Garg <vakul@freescale.com> Signed-off-by: Tang Yuantian <Yuantian.Tang@freescale.com> Signed-off-by: Zhao Chenhui <chenhui.zhao@freescale.com> Signed-off-by: Li Yang <leoli@freescale.com> Signed-off-by: Ramneek Mehresh <ramneek.mehresh@freescale.com> Signed-off-by: Laurentiu Tudor <Laurentiu.Tudor@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Add AltiVec support for e6500Kumar Gala2013-03-126-5/+75
| | | | | | | | The e6500 core adds support for AltiVec on a Book-E class processor. Connect up all the various exception handling code and build config mechanisms to allow user spaces apps to utilize AltiVec. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/fsl-booke: Support detection of page sizes on e6500Kumar Gala2013-03-051-2/+16
| | | | | | | | | | | | | | The e6500 core used on T4240 and B4860 SoCs from FSL implements MMUv2 of the Power Book-E Architecture. However there are some minor differences between it and other Book-E implementations. Add support to parse SPRN_TLB1PS for the variable page sizes supported. In the future this should be expanded for more page sizes supported on e6500 as well as other MMU features. This patch is based on code from Scott Wood. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Add support for FSL PCIe controller v3.0Roy ZANG2013-03-052-3/+37
| | | | | | | | | | | | | The T4240 utilizes a new PCIe controller block that has some minor programming model differences from previous versions. The major one that impacts initialization is how we determine the link state. On the 3.x controllers we have a memory mapped SoC register instead of a PCI config register that reports the link state. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/85xx: Added SEC-5.0 device tree.Vakul Garg2013-03-051-0/+109
| | | | | | | | Add device tree for SEC (crypto engine) version 5.0 used on T4240. Signed-off-by: Vakul Garg <vakul@freescale.com> Signed-off-by: Andy Fleming <afleming@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc: add missing deo arch category to e500mc/e5500 dtsStuart Yoder2013-03-052-0/+2
| | | | | Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc/e6500: Add architecture categories for e6500 coresStuart Yoder2013-03-052-0/+87
| | | | | | | -also define a binding for fsl,eref-* properties Signed-off-by: Stuart Yoder <stuart.yoder@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* powerpc: Set DSCR bit in FSCR setupMichael Neuling2013-03-051-1/+1
| | | | | | | | | | We support DSCR (Data Stream Control Register) so we should make sure we set it in the FSCR (Facility Status & Control Register) incase some firmwares don't set it. If we don't set this, we'll take a facility unavailable exception when using the DSCR. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc: Add DSCR FSCR register bit definitionMichael Neuling2013-03-051-1/+2
| | | | | | | | | | This sets the DSCR (Data Stream Control Register) in the FSCR (Facility Status & Control Register). Also harmonise TAR (Target Address Register) FSCR bit definition too. Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc: Fix setting FSCR for HV=0 and on secondary CPUsMichael Neuling2013-03-051-1/+2
| | | | | | | | | | | | Currently we only set the FSCR (Facility Status and Control Register) when HV=1 but this feature is available when HV=0 also. This patch sets FSCR when HV=0. Also, we currently only set the FSCR on the master CPU. This patch also sets the FSCR on secondary CPUs. Signed-off-by: Michael Neuling <mikey@neuling.org> cc: Ian Munsie <imunsie@au1.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc: Wireup the kcmp syscall to sys_niTony Breeds2013-03-053-1/+3
| | | | | | | | | Since kmp takes 2 unsigned long args there should be a compat wrapper. Since one isn't provided I think it's safer just to hook this up to not implemented. If we need it later we can do it properly then. Signed-off-by: Tony Breeds <tony@bakeyournoodle.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc: Remove unused BITOP_LE_SWIZZLE macroAkinobu Mita2013-03-051-2/+0
| | | | | | | | | | | | The BITOP_LE_SWIZZLE macro was used in the little-endian bitops functions for powerpc. But these functions were converted to generic bitops and the BITOP_LE_SWIZZLE is not used anymore. Signed-off-by: Akinobu Mita <akinobu.mita@gmail.com> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul Mackerras <paulus@samba.org> Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* powerpc: Avoid link stack corruption in MMU on syscall entry pathMichael Neuling2013-03-051-2/+2
| | | | | | | | | | | | | | | | Currently we use the link register to branch up high in the early MMU on syscall entry path. Unfortunately, this trashes the link stack as the address we are going to is not associated with the earlier mflr. This patch simply converts us to used the count register (volatile over syscalls anyway) instead. This is much better at predicting in this scenario and doesn't trash link stack causing a bunch of additional branch mispredicts later. Benchmarking this on POWER8 saves a bunch of cycles on Anton's null syscall benchmark here: http://ozlabs.org/~anton/junkcode/null_syscall.c Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* drivers/tty/hvc: Use strlcpy instead of strncpyChen Gang2013-03-051-7/+2
| | | | | | | | | when strlen pi->location_code is larger than HVCS_CLC_LENGTH + 1, original implementation can not let hvcsd->p_location_code NUL terminated. so need fix it (also can simplify the code) Signed-off-by: Chen Gang <gang.chen@asianux.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
OpenPOWER on IntegriCloud