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* Documentation: Mention that KProbes is supported on MIPSDavid Daney2010-08-051-0/+1
| | | | | | | | | | | | | | | MIPS now has KProbes support, so kprobes.txt should reflect it. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: ananth@in.ibm.com To: anil.s.keshavamurthy@intel.com To: davem@davemloft.net To: masami.hiramatsu.pt@hitachi.com Cc: linux-kernel@vger.kernel.org Cc: hschauhan@nulltrace.org Patchwork: https://patchwork.linux-mips.org/patch/1527/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* SAMPLES: kprobe_example: Make it print something on MIPS.David Daney2010-08-051-0/+9
| | | | | | | | | | | | | | | | This KProbes example is a little useless if it doesn't print anything. For MIPS print similar messages to those produced on x86 and PPC. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: ananth@in.ibm.com To: anil.s.keshavamurthy@intel.com To: davem@davemloft.net To: masami.hiramatsu.pt@hitachi.com Cc: linux-kernel@vger.kernel.org Cc: hschauhan@nulltrace.org Patchwork: https://patchwork.linux-mips.org/patch/1528/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: kprobe: Add support.David Daney2010-08-059-2/+695
| | | | | | | | | | | | | | | | | | | | This patch is based on previous work by Sony and Himanshu Chauhan. I have done some cleanup and implemented JProbes and KRETPROBES. The KRETPROBES part is pretty much copied verbatim from powerpc. A possible future enhance might be to factor out the common code. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Cc: Himanshu Chauhan <hschauhan@nulltrace.org> To: linux-mips@linux-mips.org To: ananth@in.ibm.com, To: anil.s.keshavamurthy@intel.com To: davem@davemloft.net To: masami.hiramatsu.pt@hitachi.com Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1525/ Patchwork: https://patchwork.linux-mips.org/patch/1530/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Add instrunction format for BREAK and SYSCALLDavid Daney2010-08-051-1/+14
| | | | | | | | | | | | | Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: ananth@in.ibm.com To: anil.s.keshavamurthy@intel.com To: davem@davemloft.net To: masami.hiramatsu.pt@hitachi.com Cc: linux-kernel@vger.kernel.org Cc: hschauhan@nulltrace.org Patchwork: https://patchwork.linux-mips.org/patch/1524/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: kprobes: Define regs_return_value()David Daney2010-08-051-0/+1
| | | | | | | | | | | | | Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: ananth@in.ibm.com To: anil.s.keshavamurthy@intel.com To: davem@davemloft.net To: masami.hiramatsu.pt@hitachi.com Cc: linux-kernel@vger.kernel.org, Cc: hschauhan@nulltrace.org Patchwork: https://patchwork.linux-mips.org/patch/1529/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Ritually kill stupid printk.Ralf Baechle2010-08-055-5/+0
| | | | | | This belongs into userland. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Disallow MSI-X interrupt and fall back to MSI interrupts.Chandrakala Chavva2010-08-052-0/+33
| | | | | | | | | | | | | MSI-X interrupts are not supported yet for Octeon, return error if MSI-X interrupts are requested by driver so that the driver will fall back to use MSI interrupts. Signed-off-by: Chandrakala Chavva <cchavva@caviumnetworks.com> To: linux-mips@linux-mips.org Cc: David Daney <ddaney@caviumnetworks.com> Patchwork: https://patchwork.linux-mips.org/patch/1506/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: David Daney <ddaney@caviumnetworks.com>
* MIPS: Octeon: Support 256 MSI on PCIeDavid Daney2010-08-052-118/+178
| | | | | | | Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/1507/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Decode core number for R2 CPUs.David Daney2010-08-051-0/+3
| | | | | | | | | | | The struct cpuinfo_mips.core field should be populated with the physical core number. For R2 CPUs, this is carried in the low 10 bits of Ebase. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1505/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: SMTC: Use %p to format pointersKulikov Vasiliy2010-08-051-2/+1
| | | | | | | | | | | | | | | While at it, drop 0x prefix. Signed-off-by: Kulikov Vasiliy <segooon@gmail.com> To: kernel-janitors@vger.kernel.org Cc: Chris Dearman <chris@mips.com> Cc: "Robert P. J. Day" <rpjday@crashcourse.ca> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: André Goddard Rosa <andre.goddard@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1458/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Remove unused macro LOONGSON_PERFCNT_IRQWu Zhangjin2010-08-051-1/+0
| | | | | | | | | | LOONGSON2_PERFCNT_IRQ is used for the irq number of the performance overflow interrupts; LOONGSON_PERFCNT_IRQ is unused so remove it. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1494/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Oprofile: add a new do_perfcnt_IRQ()Wu Zhangjin2010-08-053-4/+10
| | | | | | | | | | | | | | On FuLoong-2F IP6 is shared by the performance counter overflow interrupt and the Bonito northbridge interrupt. To reduce overhead only call do_IRQ() when oprofile is enabled to reduce overhead. This patch adds an inline function do_perfcnt_IRQ() to hide the #if's , which can be shared by the other Loongson machines, i.e. gdium. Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1492/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Loongson: Remove set_irq_trigger_mode()Wu Zhangjin2010-08-054-18/+8
| | | | | | | | | | | | | set_irq_trigger_mode() is not needed on all platforms so remove it and move the related source code to mach_init_irq(). This will allow gdium to share the common irq.c without adding an empty set_irq_trigger_mode(). Signed-off-by: Wu Zhangjin <wuzhangjin@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1493/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* WATCHDOG: Add watchdog driver for OCTEON SOCsDavid Daney2010-08-054-0/+829
| | | | | | | | | | | | | | | | | | | | | | | | | The OCTEON is a MIPS64 based SOC family with an on chip watchdog unit. The driver is split into two source files one for the C code and one for assembly. Assembly is needed to handle the NMI and then print the machine state before the reboot is triggered. Signed-off-by: David Daney <ddaney@caviumnetworks.com> Cc: Wim Van Sebroeck <wim@iguana.be> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Russell King <rmk+kernel@arm.linux.org.uk> Cc: Tony Lindgren <tony@atomide.com> Cc: Marc Zyngier <maz@misterjones.org> Cc: Thierry Reding <thierry.reding@avionic-design.de> Cc: Sam Ravnborg <sam@ravnborg.org> To: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org, Patchwork: https://patchwork.linux-mips.org/patch/1503/ Signed-off-by: Wim Van Sebroeck <wim@iguana.be> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> create mode 100644 drivers/watchdog/octeon-wdt-main.c create mode 100644 drivers/watchdog/octeon-wdt-nmi.S
* MIPS: Define ST0_NMI in asm/mipsregs.hDavid Daney2010-08-051-0/+1
| | | | | | | | | | | This is used by the forthcoming OCTEON watchdog patch. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: wim@iguana.be Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1498/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Export __cpu_number_map and __cpu_logical_map.David Daney2010-08-051-0/+4
| | | | | | | | | | | The forthcoming Octeon watchdog driver will use them. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: wim@iguana.be Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1499/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Export prom_putchar().David Daney2010-08-051-1/+5
| | | | | | | | | | | The forthcoming watchdog driver will use it. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: wim@iguana.be Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1499/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: uasm: Add option to export uasm API.David Daney2010-08-054-63/+110
| | | | | | | | | | | | | | | | A 'select EXPORT_UASM' in Kconfig will cause the uasm to be exported for use in modules. When it is exported, all the uasm data and code cease to be __init and __initdata. Also daddiu_bug cannot be __cpuinitdata if uasm is exported. The cleanest thing is to just make it normal data. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: wim@iguana.be Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1500/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: uasm: Add BBIT0 and BBIT1 instructionsDavid Daney2010-08-052-1/+25
| | | | | | | | | | | These are OCTEON specific instructions. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: wim@iguana.be Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1496/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: uasm: Add drotr32 and uasm_i_drotr_safe.David Daney2010-08-052-5/+18
| | | | | | | | | Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org To: wim@iguana.be Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1495/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Implement delays with cycle counter.David Daney2010-08-054-13/+58
| | | | | | | | | | | Power throttling make deterministic delay loops impossible. Re-implement delays using the cycle counter. This also allows us to get rid of the code that calculates loops per jiffy. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1317/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: Add qi_lb60 board supportLars-Peter Clausen2010-08-053-0/+477
| | | | | | | | | | Add support for the qi_lb60 (a.k.a QI Ben NanoNote) clamshell device. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1472/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* POWER: Add JZ4740 battery driver.Lars-Peter Clausen2010-08-054-0/+481
| | | | | | | | | | | Add support for the battery voltage measurement part of the JZ4740 ADC unit. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Anton Vorontsov <cbouatmailru@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1416/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* HWMON: Add JZ4740 ADC driverLars-Peter Clausen2010-08-053-0/+241
| | | | | | | | | | | | | Add support for reading the ADCIN pin of the ADC unit on JZ4740 SoCs. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: lm-sensors@lm-sensors.org Acked-by: Jean Delvare <khali@linux-fr.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1425/ Signed-off-by: Axel Lin <axel.lin@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* USB: Add JZ4740 OHCI supportLars-Peter Clausen2010-08-053-0/+282
| | | | | | | | | | | | | | Add OHCI glue code for JZ4740 SoCs OHCI module. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: Greg Kroah-Hartman <gregkh@suse.de> Cc: David Brownell <dbrownell@users.sourceforge.net> Cc: linux-usb@vger.kernel.org Acked-by: Greg Kroah-Hartman <gregkh@suse.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1411/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MMC: Add support for the controller on JZ4740 SoCs.Lars-Peter Clausen2010-08-054-0/+1054
| | | | | | | | | | | | | Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Matt Fleming <matt@console-pimps.org> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: Matt Fleming <matt@console-pimps.org> Cc: linux-mmc@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1463/ Patchwork: https://patchwork.linux-mips.org/patch/1523/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MTD: Nand: Add JZ4740 NAND driverLars-Peter Clausen2010-08-054-0/+557
| | | | | | | | | | | | Add support for the NAND controller on JZ4740 SoCs. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: David Woodhouse <dwmw2@infradead.org> Cc: linux-mtd@lists.infradead.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1470/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* FBDEV: JZ4740: Add framebuffer driverLars-Peter Clausen2010-08-054-0/+924
| | | | | | | | | | | | Add support for the LCD controller on JZ4740 SoCs. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: Andrew Morton <akpm@linux-foundation.org> Cc: linux-fbdev@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1470/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* RTC: Add JZ4740 RTC driverLars-Peter Clausen2010-08-053-0/+357
| | | | | | | | | | | | | | | Add support for the RTC unit on JZ4740 SoCs. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: Alessandro Zummo <a.zummo@towertech.it> Cc: Paul Gortmaker <p_gortmaker@yahoo.com> Cc: rtc-linux@googlegroups.com Acked-by: Wan ZongShun <mcuos.com@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: Alessandro Zummo <a.zummo@towertech.it>, Patchwork: https://patchwork.linux-mips.org/patch/1424/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: Add Kbuild filesLars-Peter Clausen2010-08-055-0/+43
| | | | | | | | | | | Add the Kbuild files for the JZ4740 architecture and adds JZ4740 support to the MIPS Kbuild files. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1406/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: Add platform devicesLars-Peter Clausen2010-08-052-0/+327
| | | | | | | | | | Add platform devices for all the JZ4740 platform drivers. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1469/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: Add prom supportLars-Peter Clausen2010-08-051-0/+68
| | | | | | | | | | | Add support for initializing arcs_cmdline on JZ4740 based machines and provides a prom_putchar implementation. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1404/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: Add serial supportLars-Peter Clausen2010-08-052-0/+53
| | | | | | | | | | | | | | The JZ4740 UART interface is almost 16550 compatible. The UART module needs to be enabled by setting a bit in the FCR register and it has support for receive timeout interrupts. Instead of adding yet another machine specific quirk to the 8250 serial driver we provide a serial_out implementation which sets the required additional flags. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1403/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: Add PWM supportLars-Peter Clausen2010-08-051-0/+177
| | | | | | | | | | Add support for the PWM part of the timer unit on a JZ4740 SoC. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1468/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: Add DMA support.Lars-Peter Clausen2010-08-052-0/+379
| | | | | | | | | | Add support for DMA transfers on JZ4740 SoCs. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1401/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: Add GPIO supportLars-Peter Clausen2010-08-052-0/+1002
| | | | | | | | | | Add gpiolib support for JZ4740 SoCs. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1467/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: Add setup codeLars-Peter Clausen2010-08-051-0/+29
| | | | | | | | | | Add plat_mem_setup and get_system_type for JZ4740 SoCs. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1399/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: Add power-management and system reset supportLars-Peter Clausen2010-08-053-0/+141
| | | | | | | | | | Add support for suspend/resume and poweroff/reboot on a JZ4740 SoC. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1398/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: Add clocksource/clockevent support.Lars-Peter Clausen2010-08-051-0/+144
| | | | | | | | | | | Add clocksource and clockevent support for the timer/counter unit on JZ4740 SoCs. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1397/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: Add timer supportLars-Peter Clausen2010-08-053-0/+206
| | | | | | | | | | | | Add support for the timer/counter unit on a JZ4740 SoC. This code is used as a common base for the JZ4740 clocksource/clockevent implementation and PWM support. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1396/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: Add IRQ handler codeLars-Peter Clausen2010-08-053-0/+245
| | | | | | | | | | Add support for IRQ handling on a JZ4740 SoC. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1465/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: Add clock API support.Lars-Peter Clausen2010-08-054-0/+1137
| | | | | | | | | | | Add support for managing the clocks found on JZ4740 SoC through the Linux clock API. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1466/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: JZ4740: Add base support for Ingenic JZ4740 System-on-a-ChipLars-Peter Clausen2010-08-057-1/+141
| | | | | | | | | | | | Adds a new cpu type for the JZ4740 to the Linux MIPS architecture code. It also adds the iomem addresses for the different components found on a JZ4740 SoC. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1464/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: HOTPLUG_CPU fixes.David Daney2010-08-053-78/+65
| | | | | | | | | | | | | | | | | | | | * Rename camel-case InitTLBStart_addr to octeon_bootloader_entry_addr. * Convert calls to cvmx_read64_uint32(), to simple pointer dereferences. * Set proper ebase. * Don't confuse coreid and cpu numbers. * Try to maintain consistent bootloader coremask. * Update the signature and boot_init_vector of supported bootloaders. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1491/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Simplify hotcpu_notifier registration.David Daney2010-08-051-7/+1
| | | | | | | Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1490/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Clean up SMP CPU numbering.David Daney2010-08-051-7/+30
| | | | | | | | | | Also number offline CPUs that could potentially be brought on-line later. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1489/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Make MSI use handle_simple_irq().David Daney2010-08-051-46/+15
| | | | | | | | | | | | | | The use of handle_percpu_irq() is not really what we want for MSI, use handle_simple_irq() instead. This is probably the prototypical case for using handle_simple_irq(), because all the MSIs are dispatched from the root interrupt service routine. Also since the base IRQ is not shared, don't pass IRQF_SHARED. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1488/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Get rid of a bunch of MSI IRQ number definitions.David Daney2010-08-052-66/+4
| | | | | | | | | | MSI IRQ numbers are allocated dynamically, so there is no reason to have all these static definitions. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1487/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Fix fixup_irqs for HOTPLUG_CPUDavid Daney2010-08-051-39/+69
| | | | | | | | | | | | | The original version went behind the back of everything, leaving things in an inconsistent state. Now we use the irq_set_affinity() to do the work for us. This has the advantage that the IRQ core's view of the affinity stays consistent. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1486/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
* MIPS: Octeon: Improve interrupt handling.David Daney2010-08-051-100/+256
| | | | | | | | | | | | | | | | | | The main change is to change most of the IRQs from handle_percpu_irq to handle_fasteoi_irq. This necessitates extracting all the .ack code to common functions that are not exposed to the irq core. The affinity code now acts more sanely, by doing round-robin distribution instead of broadcasting. Because of the change to handle_fasteoi_irq and affinity, some of the IRQs had to be split into separate groups with their own struct irq_chip to prevent undefined operations on specific IRQ lines. Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/1485/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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