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* clk: st: Fix error paths and allocation styleStephen Boyd2015-07-131-38/+45
| | | | | | | | | | | | | | The error paths in this file leak memory and mappings and test for pointers being valid after dereferencing them. Fix these problems and properly free resources on errors. Fix some stylistic things too like using sizeof(*ptr) and fitting more code on a single line. Note that we don't unregister clocks here. That needs a clk_composite_unregister() API that we don't have right now. Acked-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Cc: Pankaj Dev <pankaj.dev@st.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* Merge branch 'clk-fixes' into clk-nextStephen Boyd2015-07-071-1/+1
|\ | | | | | | | | * clk-fixes: drivers: clk: st: Incorrect register offset used for lock_status
| * drivers: clk: st: Incorrect register offset used for lock_statusPankaj Dev2015-07-071-1/+1
| | | | | | | | | | | | | | | | | | Incorrect register offset used for sthi407 clockgenC Signed-off-by: Pankaj Dev <pankaj.dev@st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Fixes: 51306d56ba81 ("clk: st: STiH407: Support for clockgenC0") Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* | clk: Move clk_provider_list to scope of function using itStephen Boyd2015-07-071-2/+1
| | | | | | | | | | | | | | | | | | The list isn't used after of_clk_init() is called, so we don't need to keep an empty list around after init. Put the list on the stack. Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* | clk: Check for allocation errors in of_clk_init()Stephen Boyd2015-07-071-2/+11
| | | | | | | | | | | | | | | | | | | | Dan Carpenter reports that we don't check the allocation here for failure. Add a failure check and free any previously allocated providers from the clk_provider_list. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Cc: Gregory CLEMENT <gregory.clement@free-electrons.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* | Merge branch 'clk-rk3368' into clk-nextStephen Boyd2015-07-0714-16/+1555
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | * clk-rk3368: clk: rockchip: add rk3368 clock controller clk: rockchip: add missing include guards clk: rockchip: add dt-binding header for rk3368 dt-bindings: add documentation of rk3668 clock controller clk: rockchip: define the inverters of rk3066/rk3188 and rk3288 clk: rockchip: fix issues in the mmc-phase clock clk: rockchip: add support for phase inverters clk: rockchip: add COMPOSITE_NOGATE_DIVTBL variant clk: rockchip: protect register macros against multipart values clk: rockchip: fix faulty vip parent name on rk3288 clk: rockchip: rk3288: add CLK_SET_RATE_PARENT to sclk_mac
| * | clk: rockchip: add rk3368 clock controllerHeiko Stuebner2015-07-063-0/+898
| | | | | | | | | | | | | | | | | | | | | Describe the clock tree and software resets of the rk3368 ARM64 SoC Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * | clk: rockchip: add missing include guardsHeiko Stuebner2015-07-064-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | Review for the rk3368 turned up that the clock header was missing include guards. This is also true for the already existing clock binding headers, so add them. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * | clk: rockchip: add dt-binding header for rk3368Heiko Stuebner2015-07-061-0/+384
| | | | | | | | | | | | | | | | | | | | | | | | Add the dt-bindings header for the rk3368, that gets shared between the clock controller and the clock references in the dts. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * | dt-bindings: add documentation of rk3668 clock controllerHeiko Stuebner2015-07-061-0/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add the devicetree binding for the cru on the rk3368 which quite similar structured as previous clock controllers. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Cc: Rob Herring <robh+dt@kernel.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: devicetree@vger.kernel.org Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * | clk: rockchip: define the inverters of rk3066/rk3188 and rk3288Heiko Stuebner2015-07-062-2/+14
| | | | | | | | | | | | | | | | | | | | | | | | Both soc series' have inverters on the hsadc and camera interface clock paths. So define them using the newly added inverter type. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * | clk: rockchip: fix issues in the mmc-phase clockHeiko Stuebner2015-07-061-3/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | The review for the new inverter clock type uncovered some issues (missing headers and name handling) that are also present in the mmc-phase clock type, I got (to much) inspiration from. Fix these there too. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * | clk: rockchip: add support for phase invertersHeiko Stuebner2015-07-064-0/+144
| | | | | | | | | | | | | | | | | | | | | | | | | | | Most Rockchip socs have optional phase inverters connected to some clocks that move the clock-phase by 180 degrees. Signed-off-by: Heiko Stuebner <heiko@sntech.de> [sboyd@codeaurora.org: Dropped lazy part of commit text] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * | clk: rockchip: add COMPOSITE_NOGATE_DIVTBL variantHeiko Stuebner2015-07-061-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | A clock branch consisting of a mux and divider with non-standard divider values. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * | clk: rockchip: protect register macros against multipart valuesHeiko Stuebner2015-07-061-8/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The macros calculate the correct offset from the id in the parameter. If this parameter does not consist of a single number, the calculation will return wrong registers in the best case or create unaligned accesses in the worst case. So protect the calculations against such values. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * | clk: rockchip: fix faulty vip parent name on rk3288Heiko Stuebner2015-07-061-2/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | The video input processor (vip) was called camera interface (cif) on older socs which seems to have resulted in a copy'n'paste error when creating the rk3288 camera clocks. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * | clk: rockchip: rk3288: add CLK_SET_RATE_PARENT to sclk_macHeiko Stuebner2015-07-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The dwmac ethernet controller on the rk3288 supports phys connected via rgmii and rmii. With rgmii phys it is expected that the mac clock is provided externally while with rmii phys the clock can be external but also generated from the plls. In the later case it of course needs be at 50MHz, which gets set from the dwmac_rk driver. As most devices use a rgmii phy it never surfaced so far that the mac clk mux, doesn't go up one lever to the pll clock in the rmii case with internal clock generation, as it is missing the CLK_SET_RATE_PARENT flag, and thus will not set the correct frequency in most cases. Fixes: b9e4ba541607 ("clk: rockchip: add clock controller for rk3288") Cc: stable@vger.kernel.org Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* | | clk: qcom: Add support for SR2 PLLsGeorgi Djakov2015-07-072-0/+76
| | | | | | | | | | | | | | | | | | | | | | | | Add support for SR2 type pll operations. SR2 is optimized for Time Interval Error (TIE) or absolute jitter. Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* | | clk: at91: Silence warnings and cleanup __init/extern usageStephen Boyd2015-07-071-66/+58
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Remove useless ifdefs around function prototypes to silence the following sparse warnings when the configs aren't enabled. drivers/clk/at91/clk-h32mx.c:95:13: warning: symbol 'of_sama5d4_clk_h32mx_setup' was not declared. Should it be static? drivers/clk/at91/clk-utmi.c:159:13: warning: symbol 'of_at91sam9x5_clk_utmi_setup' was not declared. Should it be static? Plus, using __init and extern in function prototypes doesn't do anything, so just drop it throughout this file. Acked-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Acked-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* | | clk: qcom: Constify the parent names arraysGeorgi Djakov2015-07-0611-67/+67
| | | | | | | | | | | | | | | | | | | | | | | | Make const both the array and the strings, so they can be moved to .rodata section. Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* | | clk: xgene: Delete duplicated name fieldMatthias Brugger2015-07-061-15/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | | X-Gene clocks implement it's name in the clock private struct. This is a duplication of the name field. We can delete the field and rely on the common implementation to retrieve the name. Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* | | clk: Rename clk-gpio-gate.c to clk-gpio.cSergej Sawazki2015-07-062-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | The file clk-gpio-gate.c does not only contain the gate clock, but also the mux clock. Rename the file to clk-gpio.c. Cc: Jyri Sarha <jsarha@ti.com> Signed-off-by: Sergej Sawazki <ce3a@gmx.de> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* | | clk: add gpio controlled clock multiplexerSergej Sawazki2015-07-063-64/+214
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Add a common clock driver for basic gpio controlled clock multiplexers. This driver can be used for devices like 5V41068A or 831721I from IDT or for discrete multiplexer circuits. The 'select' pin selects one of two parent clocks. Cc: Jyri Sarha <jsarha@ti.com> Signed-off-by: Sergej Sawazki <ce3a@gmx.de> [sboyd@codeaurora.org: Fix error paths to free memory and do it in the correct order] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* | | clk: gpio-gate: Stay silent on EPROBE_DEFERSergej Sawazki2015-07-061-2/+3
| | | | | | | | | | | | | | | | | | | | | | | | Do not output an error message if requesting gpio failes with EPROBE_DEFER. Cc: Jyri Sarha <jsarha@ti.com> Signed-off-by: Sergej Sawazki <ce3a@gmx.de> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* | | clk: gpio-gate: Include export.h instead of module.hSergej Sawazki2015-07-061-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | Include export.h for EXPORT_SYMBOL_GPL, no need to include module.h. Cc: Jyri Sarha <jsarha@ti.com> Signed-off-by: Sergej Sawazki <ce3a@gmx.de> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* | | Merge branch 'clk-fixes' into clk-nextStephen Boyd2015-07-0615-49/+73
|\ \ \ | |/ / |/| / | |/ | | | | | | | | | | | | | | | | | | | | | | * clk-fixes: clk: mediatek: mt8173: Fix enabling of critical clocks drivers: clk: st: Fix mux bit-setting for Cortex A9 clocks drivers: clk: st: Add CLK_GET_RATE_NOCACHE flag to clocks drivers: clk: st: Fix flexgen lock init drivers: clk: st: Fix FSYN channel values drivers: clk: st: Remove unused code clk: qcom: Use parent rate when set rate to pixel RCG clock clk: at91: do not leak resources clk: stm32: Fix out-by-one error path in the index lookup clk: iproc: fix bit manipulation arithmetic clk: iproc: fix memory leak from clock name
| * clk: mediatek: mt8173: Fix enabling of critical clocksSascha Hauer2015-07-061-5/+21
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On the MT8173 the clocks are provided by different units. To enable the critical clocks we must be sure that all parent clocks are already registered, otherwise the parents of the critical clocks end up being unused and get disabled later. To find a place where all parents are registered we try each time after we've registered some clocks if all known providers are present now and only then we enable the critical clocks Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: James Liao <jamesjj.liao@mediatek.com> [sboyd@codeaurora.org: Marked function and data __init] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * drivers: clk: st: Fix mux bit-setting for Cortex A9 clocksGabriel Fernandez2015-07-061-1/+1
| | | | | | | | | | | | | | | | This patch fixes the mux bit-setting for ClockgenA9. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Fixes: 13e6f2da1ddf ("clk: st: STiH407: Support for A9 MUX Clocks") Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * drivers: clk: st: Add CLK_GET_RATE_NOCACHE flag to clocksPankaj Dev2015-07-064-6/+8
| | | | | | | | | | | | | | | | | | | | Add the CLK_GET_RATE_NOCACHE flag to all the clocks with recalc ops, so that they reflect Hw rate after CPS wake-up when a clk_get_rate() is called Signed-off-by: Pankaj Dev <pankaj.dev@st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * drivers: clk: st: Fix flexgen lock initGiuseppe Cavallaro2015-07-061-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | While proving lock, the following warning happens and it is fixed after initializing lock in the setup function INFO: trying to register non-static key. the code is fine but needs lockdep annotation. turning off the locking correctness validator. CPU: 0 PID: 0 Comm: swapper/0 Not tainted 3.10.27-02861-g39df285-dirty #33 [<c00154ac>] (unwind_backtrace+0x0/0xf4) from [<c0011b50>] (show_stack+0x10/0x14) [<c0011b50>] (show_stack+0x10/0x14) from [<c00689ac>] (__lock_acquire+0x900/0xb14) [<c00689ac>] (__lock_acquire+0x900/0xb14) from [<c0069394>] (lock_acquire+0x68/0x7c) [<c0069394>] (lock_acquire+0x68/0x7c) from [<c04958f8>] (_raw_spin_lock_irqsave+0x48/0x5c) [<c04958f8>] (_raw_spin_lock_irqsave+0x48/0x5c) from [<c0381e6c>] (clk_gate_endisable+0x28/0x88) [<c0381e6c>] (clk_gate_endisable+0x28/0x88) from [<c0381ee0>] (clk_gate_enable+0xc/0x14) [<c0381ee0>] (clk_gate_enable+0xc/0x14) from [<c0386c68>] (flexgen_enable+0x28/0x40) [<c0386c68>] (flexgen_enable+0x28/0x40) from [<c037f260>] (__clk_enable+0x5c/0x9c) [<c037f260>] (__clk_enable+0x5c/0x9c) from [<c037f558>] (clk_enable+0x18/0x2c) [<c037f558>] (clk_enable+0x18/0x2c) from [<c064a1dc>] (st_lpc_of_register+0xc0/0x248) [<c064a1dc>] (st_lpc_of_register+0xc0/0x248) from [<c0649e44>] (clocksource_of_init+0x34/0x58) [<c0649e44>] (clocksource_of_init+0x34/0x58) from [<c0637ddc>] (sti_timer_init+0x10/0x18) [<c0637ddc>] (sti_timer_init+0x10/0x18) from [<c06343f8>] (time_init+0x20/0x30) [<c06343f8>] (time_init+0x20/0x30) from [<c0632984>] (start_kernel+0x20c/0x2e8) [<c0632984>] (start_kernel+0x20c/0x2e8) from [<40008074>] (0x40008074) Signed-off-by: Giuseppe Cavallaro <peppe.cavallaro@st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Fixes: b116517055b7 ("clk: st: STiH407: Support for Flexgen Clocks") Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * drivers: clk: st: Fix FSYN channel valuesGabriel Fernandez2015-07-061-2/+2
| | | | | | | | | | | | | | | | | | This patch fixes the value for disabling the FSYN channel clock. The 'is_enabled' returned value is also fixed. Signed-off-by: Pankaj Dev <pankaj.dev@st.com> Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * drivers: clk: st: Remove unused codeGabriel Fernandez2015-07-061-4/+0
| | | | | | | | | | | | | | Remove this duplicated code due to a bad copy / paste. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * clk: qcom: Use parent rate when set rate to pixel RCG clockHai Li2015-07-061-6/+3
| | | | | | | | | | | | | | | | | | | | | | | | Since the parent rate has been recalculated, pixel RCG clock should rely on it to find the correct M/N values during set_rate, instead of calling __clk_round_rate() to its parent again. Signed-off-by: Hai Li <hali@codeaurora.org> Tested-by: Archit Taneja <architt@codeaurora.org> Fixes: 99cbd064b059 ("clk: qcom: Support display RCG clocks") [sboyd@codeaurora.org: Silenced unused parent variable warning] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * clk: at91: do not leak resourcesDavid Dueck2015-07-026-10/+30
| | | | | | | | | | | | | | | | Do not leak memory and free irqs in case of an error. Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: David Dueck <davidcdueck@googlemail.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * clk: stm32: Fix out-by-one error path in the index lookupDaniel Thompson2015-07-021-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If stm32f4_rcc_lookup() is called with primary == 0 and secondary == 192 then it will read beyond the end of the table array due to an out-by-one error in the range check. In addition to the fixing the inequality we also modify the r.h.s. to make it even more explicit that we are comparing against the size of table in bits. Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Daniel Thompson <daniel.thompson@linaro.org> Acked-by: Maxime Coquelin <mcoquelin.stm32@gmail.com> Fixes: 358bdf892f6b ("clk: stm32: Add clock driver for STM32F4[23]xxx devices") Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * clk: iproc: fix bit manipulation arithmeticRay Jui2015-07-021-2/+3
| | | | | | | | | | | | | | | | | | | | A 32-bit variable should be type casted to 64-bit before arithmetic operation and assigning it to a 64-bit variable Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Ray Jui <rjui@broadcom.com> Fixes: 5fe225c105fd ("clk: iproc: add initial common clock support") Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
| * clk: iproc: fix memory leak from clock nameRay Jui2015-07-022-12/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | of_property_read_string_index takes array of pointers and assign them to strings read from device tree property. No additional memory allocation is needed prior to calling of_property_read_string_index. In fact, since the array of pointers will be re-assigned to other strings, any memory that it points to prior to calling of_property_read_string_index will be leaked Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Ray Jui <rjui@broadcom.com> Fixes: 5fe225c105fd ("clk: iproc: add initial common clock support") Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
* | Linux 4.2-rc1Linus Torvalds2015-07-051-2/+2
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* | Merge tag 'platform-drivers-x86-v4.2-2' of ↵Linus Torvalds2015-07-057-45/+1004
|\ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.infradead.org/users/dvhart/linux-platform-drivers-x86 Pull late x86 platform driver updates from Darren Hart: "The following came in a bit later and I wanted them to bake in next a few more days before submitting, thus the second pull. A new intel_pmc_ipc driver, a symmetrical allocation and free fix in dell-laptop, a couple minor fixes, and some updated documentation in the dell-laptop comments. intel_pmc_ipc: - Add Intel Apollo Lake PMC IPC driver tc1100-wmi: - Delete an unnecessary check before the function call "kfree" dell-laptop: - Fix allocating & freeing SMI buffer page - Show info about WiGig and UWB in debugfs - Update information about wireless control" * tag 'platform-drivers-x86-v4.2-2' of git://git.infradead.org/users/dvhart/linux-platform-drivers-x86: intel_pmc_ipc: Add Intel Apollo Lake PMC IPC driver tc1100-wmi: Delete an unnecessary check before the function call "kfree" dell-laptop: Fix allocating & freeing SMI buffer page dell-laptop: Show info about WiGig and UWB in debugfs dell-laptop: Update information about wireless control
| * | intel_pmc_ipc: Add Intel Apollo Lake PMC IPC driverqipeng.zha2015-06-295-0/+864
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This driver provides support for PMC control on Apollo Lake platforms. The PMC is an ARC processor which defines some IPC commands for communication with other entities in the CPU. Signed-off-by: qipeng.zha <qipeng.zha@intel.com> [fengguang.wu@intel.com: Fix Sparse and Cocinelle warnings] Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Darren Hart <dvhart@linux.intel.com>
| * | tc1100-wmi: Delete an unnecessary check before the function call "kfree"Markus Elfring2015-06-261-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The kfree() function tests whether its argument is NULL and then returns immediately. Thus the test around the call is not needed. This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Darren Hart <dvhart@linux.intel.com>
| * | dell-laptop: Fix allocating & freeing SMI buffer pagePali Rohár2015-06-241-5/+3
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This commit fix kernel crash when probing for rfkill devices in dell-laptop driver failed. Function free_page() was incorrectly used on struct page * instead of virtual address of SMI buffer. This commit also simplify allocating page for SMI buffer by using __get_free_page() function instead of sequential call of functions alloc_page() and page_address(). Signed-off-by: Pali Rohár <pali.rohar@gmail.com> Acked-by: Michal Hocko <mhocko@suse.cz> Cc: stable@vger.kernel.org Signed-off-by: Darren Hart <dvhart@linux.intel.com>
| * | dell-laptop: Show info about WiGig and UWB in debugfsPali Rohár2015-06-221-0/+17
| | | | | | | | | | | | | | | | | | | | | | | | This commit show additional information about rfkill state in debugfs based on newly released documentation by Dell. Signed-off-by: Pali Rohár <pali.rohar@gmail.com> Signed-off-by: Darren Hart <dvhart@linux.intel.com>
| * | dell-laptop: Update information about wireless controlPali Rohár2015-06-221-39/+119
| | | | | | | | | | | | | | | | | | | | | | | | Make sure that all existing SMBIOS calls for wireless control are properly documented. This commit also add new documentation released by Dell. Signed-off-by: Pali Rohár <pali.rohar@gmail.com> Signed-off-by: Darren Hart <dvhart@linux.intel.com>
* | | Merge branch 'for-linus' of ↵Linus Torvalds2015-07-0499-553/+784
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs Pull more vfs updates from Al Viro: "Assorted VFS fixes and related cleanups (IMO the most interesting in that part are f_path-related things and Eric's descriptor-related stuff). UFS regression fixes (it got broken last cycle). 9P fixes. fs-cache series, DAX patches, Jan's file_remove_suid() work" [ I'd say this is much more than "fixes and related cleanups". The file_table locking rule change by Eric Dumazet is a rather big and fundamental update even if the patch isn't huge. - Linus ] * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs: (49 commits) 9p: cope with bogus responses from server in p9_client_{read,write} p9_client_write(): avoid double p9_free_req() 9p: forgetting to cancel request on interrupted zero-copy RPC dax: bdev_direct_access() may sleep block: Add support for DAX reads/writes to block devices dax: Use copy_from_iter_nocache dax: Add block size note to documentation fs/file.c: __fget() and dup2() atomicity rules fs/file.c: don't acquire files->file_lock in fd_install() fs:super:get_anon_bdev: fix race condition could cause dev exceed its upper limitation vfs: avoid creation of inode number 0 in get_next_ino namei: make set_root_rcu() return void make simple_positive() public ufs: use dir_pages instead of ufs_dir_pages() pagemap.h: move dir_pages() over there remove the pointless include of lglock.h fs: cleanup slight list_entry abuse xfs: Correctly lock inode when removing suid and file capabilities fs: Call security_ops->inode_killpriv on truncate fs: Provide function telling whether file_remove_privs() will do anything ...
| * | | 9p: cope with bogus responses from server in p9_client_{read,write}Al Viro2015-07-041-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | if server claims to have written/read more than we'd told it to, warn and cap the claimed byte count to avoid advancing more than we are ready to.
| * | | p9_client_write(): avoid double p9_free_req()Al Viro2015-07-041-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Braino in "9p: switch p9_client_write() to passing it struct iov_iter *"; if response is impossible to parse and we discard the request, get the out of the loop right there. Cc: stable@vger.kernel.org Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
| * | | 9p: forgetting to cancel request on interrupted zero-copy RPCAl Viro2015-07-041-1/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If we'd already sent a request and decide to abort it, we *must* issue TFLUSH properly and not just blindly reuse the tag, or we'll get seriously screwed when response eventually arrives and we confuse it for response to later request that had reused the same tag. Cc: stable@vger.kernel.org # v3.2 and later Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
| * | | dax: bdev_direct_access() may sleepMatthew Wilcox2015-07-041-0/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The brd driver is the only in-tree driver that may sleep currently. After some discussion on linux-fsdevel, we decided that any driver may choose to sleep in its ->direct_access method. To ensure that all callers of bdev_direct_access() are prepared for this, add a call to might_sleep(). Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com> Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
| * | | block: Add support for DAX reads/writes to block devicesMatthew Wilcox2015-07-042-2/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If a block device supports the ->direct_access methods, bypass the normal DIO path and use DAX to go straight to memcpy() instead of allocating a DIO and a BIO. Includes support for the DIO_SKIP_DIO_COUNT flag in DAX, as is done in do_blockdev_direct_IO(). Signed-off-by: Matthew Wilcox <matthew.r.wilcox@intel.com> Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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