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| * drivers/edac/mpc85xx_edac.c: fix memory controller compatible for edacShaohui Xie2011-11-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | compatible in dts has been changed, so the driver needs to be updated accordingly. Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/qe: Fixup QE_General4 errataJoakim Tjernlund2011-11-241-1/+1
| | | | | | | | | | | | | | | | | | | | QE_General4 should only round up the divisor iff divisor is > 3. Rounding up lower divisors makes the error too big, causing USB on MPC832x to fail. Signed-off-by: Joakim Tjernlund <Joakim.Tjernlund@transmode.se> Acked-by: Timur Tabi <timur@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/85xx: Fix compile error on p3060_qds.cKumar Gala2011-11-231-1/+1
| | | | | | | | | | | | | | | | | | arch/powerpc/platforms/85xx/p3060_qds.c: In function '__machine_initcall_p3060_qds_declare_of_platform_devices': arch/powerpc/platforms/85xx/p3060_qds.c:73:1: error: implicit declaration of function 'declare_of_platform_devices' declare_of_platform_devices should have been corenet_ds_publish_devices. Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/p3060qds: Fix select of 'MPC8xxx_GPIO'Paul Bolle2011-11-231-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | The driver for the Freescale P3060 QDS got added by commit 96cc017c5b ("[...] Add support for P3060QDS board"). Its Kconfig entry selects MPC8xxx_GPIO. But at the time that driver got added MPC8xxx_GPIO was already renamed to GPIO_MPC8XXX, by commit c68308dd50c ("gpio: move mpc8xxx/512x gpio driver to drivers/gpio"). So make this driver select GPIO_MPC8XXX. Signed-off-by: Paul Bolle <pebolle@tiscali.nl> Acked-by: Wolfram Sang <w.sang@pengutronix.de> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
| * powerpc/p1023: set IRQ[4:6,11] to active-high level sensitive for PCIeRoy Zang2011-11-231-4/+13
| | | | | | | | | | | | | | | | | | | | | | | | | | P1023 external IRQ[4:6, 11] are not pin out, but the interrupts are utilized by the PCIe controllers. As they are not exposed as pins we need to set them as active-high (internal to the SoC these interrupts are pulled down). IRQs[0:3,7:10] are pulled up on the board so we have them set as active-low. Signed-off-by: Roy Zang <tie-fei.zang@freescale.com> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
* | powerpc/mpic: Remove extra semicolon.Justin P. Mattock2011-11-251-1/+1
| | | | | | | | | | | | | | | | | | The patch below removes an extra semicolon. Signed-off-by: Justin P. Mattock <justinmattock@gmail.com> CC: linuxppc-dev@lists.ozlabs.org CC: Paul Mackerras <paulus@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | powerpc: Export PIR data through sysfsAnanth N Mavinakayanahalli2011-11-251-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | On Fri, Nov 11, 2011 at 10:17:55AM +0530, Ananth N Mavinakayanahalli wrote: > > > > At this rate we're going to end up with no bits left for CPU features > > way too quickly... Especially for something we only care about once at > > boot time. > > > > Wouldn't CPU_FTR_PPCAS_ARCH_V2 be a good enough test ? > > /me checks Cell manuals... yes, that test would be good enough. I will > cook up a patch to use this. Here it is... Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | powerpc/powernv: PCI support for p7IOC under OPAL v2Benjamin Herrenschmidt2011-11-256-6/+1434
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This adds support for p7IOC (and possibly other IODA v1 IO Hubs) using OPAL v2 interfaces. We completely take over resource assignment and assign them using an algorithm that hands out device BARs in a way that makes them fit in individual segments of the M32 window of the bridge, which enables us to assign individual PEs to devices and functions. The current implementation gives out a PE per functions on PCIe, and a PE for the entire bridge for PCIe to PCI-X bridges. This can be adjusted / fine tuned later. We also setup DMA resources (32-bit only for now) and MSIs (both 32-bit and 64-bit MSI are supported). The DMA allocation tries to divide the available 256M segments of the 32-bit DMA address space "fairly" among PEs. This is done using a "weight" heuristic which assigns less value to things like OHCI USB controllers than, for example SCSI RAID controllers. This algorithm will probably want some fine tuning for specific devices or device types. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | powerpc/powernv: Fixup p7ioc PCIe root complex class codeBenjamin Herrenschmidt2011-11-251-0/+7
| | | | | | | | | | | | | | It advertises "host bridge" instead of "PCI to PCI bridge" which confuses the Linux probe code. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | powerpc/powernv: Add TCE SW invalidation supportBenjamin Herrenschmidt2011-11-253-16/+78
| | | | | | | | | | | | This is used for newer IO Hubs such as p7IOC. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | powerpc/pci: Change how re-assigning resouces workBenjamin Herrenschmidt2011-11-251-30/+36
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | When PCI_REASSIGN_ALL_RSRC is set, we used to clear all bus resources at the beginning of survey and re-allocate them later. This changes it so instead, during early fixup, we mark all resources as IORESOURCE_UNSET and move them down to be 0-based. Later, if bus resources are still unset at the beginning of the survey, then we clear them. This shouldn't impact the re-assignment case on 4xx, but will enable us to have the platform do some custom resource assignment before the survey, by clearing individual resources IORESOURCE_UNSET bit. Also limits the clutter in the kernel log from fixup when re-assigning since we don't care about the offset applied to the BAR values in this case. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | powerpc/pci: Add a platform hook after probe and before resource surveyBenjamin Herrenschmidt2011-11-252-0/+9
| | | | | | | | | | | | | | | | | | | | | | Some platforms need to perform resource allocation using a custom algorithm due to HW constraints, or may want to tweak things globally below a host bridge. For example OPAL support for IODA will need to perform a resource allocation pass that applies IODA specific segmentation constraints to MMIO which cannot be done simply using the kernel generic resource management code. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | powerpc: Add pgprot_cached_noncoherent()Geoff Thorpe2011-11-251-0/+3
| | | | | | | | | | | | | | | | This adds a pgprot combination required by some cache-enabled IO device mappings, such as Freescale datapath (QMan and BMan) portals. Signed-off-by: Geoff Thorpe <geoff@geoffthorpe.net> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | powerpc: Allow irq threadingThomas Gleixner2011-11-251-0/+1
| | | | | | | | | | | | | | | | All interrupts which must be non threaded are marked IRQF_NO_THREAD. So it's safe to allow force threaded handlers. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | powerpc: Mark IPI interrupts IRQF_NO_THREADThomas Gleixner2011-11-253-4/+5
| | | | | | | | | | | | | | | | IPI handlers cannot be threaded. Remove the obsolete IRQF_DISABLED flag (see commit e58aa3d2) while at it. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | powerpc/wsp: Mark opb cascade handler IRQF_NO_THREADThomas Gleixner2011-11-251-1/+2
| | | | | | | | | | | | | | Cascade handlers must run in hard interrupt context. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | powerpc/85xx: Mark cascade irq IRQF_NO_THREADThomas Gleixner2011-11-251-1/+1
| | | | | | | | | | | | | | Cascade interrupt must run in hard interrupt context. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | powerpc/pseries: Cancel RTAS event scan before firmware flashRavi K. Nittala2011-11-253-0/+19
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The RTAS firmware flash update is conducted using an RTAS call that is serialized by lock_rtas() which uses spin_lock. While the flash is in progress, rtasd performs scan for any RTAS events that are generated by the system. rtasd keeps scanning for the RTAS events generated on the machine. This is performed via workqueue mechanism. The rtas_event_scan() also uses an RTAS call to scan the events, eventually trying to acquire the spin_lock before issuing the request. The flash update takes a while to complete and during this time, any other RTAS call has to wait. In this case, rtas_event_scan() waits for a long time on the spin_lock resulting in a soft lockup. Fix: Just before the flash update is performed, the queued rtas_event_scan() work item is cancelled from the work queue so that there is no other RTAS call issued while the flash is in progress. After the flash completes, the system reboots and the rtas_event_scan() is rescheduled. Signed-off-by: Suzuki Poulose <suzuki@in.ibm.com> Signed-off-by: Ravi Nittala <ravi.nittala@in.ibm.com> Reported-by: Divya Vikas <divya.vikas@in.ibm.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | powerpc/book3e: Add Chroma as a new WSP/PowerEN platform.Jimi Xenidis2011-11-258-52/+651
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch add the Chroma platform to WSP/PowerEN, which is a PCIe card (a defconfig is included). The card includes an H8 service processor that is used to manage the card. The H8 is connected over the second serial UART on the PowerEN chip so this patch includes a simple 16550 driver to enable communication, mostly for "power off" and "rebooting". This patch also includes a, WSP specific, "halt" method that will shut of all A2 cores but still leave power on at the chip level. This is desirable, especially if you wish to interrogate the chip with a hardware probe after the halt. Signed-off-by: Jimi Xenidis <jimix@pobox.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | powerpc/xmon: Fix #if typo for systems without MSR[RI]Jimi Xenidis2011-11-251-1/+1
| | | | | | | | | | | | | | | | Sorry, there was a typo in the #if signed-off-by: Jimi Xenidis <jimix@pobox.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | powerpc/xmon: Fix the 'u' command descriptionJimi Xenidis2011-11-251-9/+5
| | | | | | | | | | | | | | | | The 'u' command will print the TLB on book3e parts and the SLB on Book3s parts, but the help system doesn't say that correctly. Signed-off-by: Jimi Xenidis <jimix@pobox.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | powerpc/icswx: Simple ACOP fault handlerJimi Xenidis2011-11-254-1/+165
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This patch adds a fault handler that responds to illegal Coprocessor types. Currently all CTs are treated and illegal. There are two ways to report the fault back to the application. If the application used the record form ("icswx.") then the architected "reject" is emulated. If the application did not used the record form ("icswx") then it is selectable by config whether the failure is silent (as architected) or a SIGILL is generated. In all cases pr_warn() is used to log the bad CT. Signed-off-by: Jimi Xenidis <jimix@pobox.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | powerpc/book3e: Add ICSWX/ACOP support to Book3e cores like A2Jimi Xenidis2011-11-256-4/+19
| | | | | | | | | | | | | | | | ICSWX is also used by the A2 processor to access coprocessors, although not all "chips" that contain A2s have coprocessors. Signed-off-by: Jimi Xenidis <jimix@pobox.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | powerpc: Split ICSWX ACOP and PID processingJimi Xenidis2011-11-256-194/+297
| | | | | | | | | | | | | | | | | | Some processors, like embedded, that already have a PID register that is managed by the system. This patch separates the ACOP and PID processing into separate files so that the ACOP code can be shared. Signed-off-by: Jimi Xenidis <jimix@pobox.com> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | perf/powerpc: Fix build for PowerPC with uclibc toolchainsFlorian Fainelli2011-11-251-0/+3
| | | | | | | | | | | | | | | | | | libio.h is not provided by uClibc, in order to be able to test the definition of __UCLIBC__ we need to include stdlib.h, which also includes stddef.h, providing the definition of 'NULL'. Signed-off-by: Florian Fainelli <florian@openwrt.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | powerpc/powermac: Add missing of_node_putJulia Lawall2011-11-251-2/+6
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | np is initialized to the result of calling a function that calls of_node_get, so of_node_put should be called before the pointer is dropped. The semantic match that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression e,e1,e2; @@ * e = \(of_find_node_by_type\|of_find_node_by_name\)(...) ... when != of_node_put(e) when != true e == NULL when != e2 = e e = e1 // </smpl> Signed-off-by: Julia Lawall <julia@diku.dk> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | powerpc/cell/iommu: Add missing of_node_putJulia Lawall2011-11-251-0/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | np is initialized to the result of calling a function that calls of_node_get, so of_node_put should be called before the pointer is dropped. The semantic match that finds this problem is as follows: (http://coccinelle.lip6.fr/) // <smpl> @@ expression e,e1,e2; @@ * e = \(of_find_node_by_type\|of_find_node_by_name\)(...) ... when != of_node_put(e) when != true e == NULL when != e2 = e e = e1 // </smpl> Signed-off-by: Julia Lawall <julia@diku.dk> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | powerpc/pseries: Software invalidatation of TCEsMilton Miller2011-11-252-8/+61
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Some pseries IOMMUs cache TCEs but don't snoop when the TCEs are changed in memory, hence we need manually invalidate in software. This adds code to do the invalidate. It keys off a device tree property to say where the to do the MMIO for the invalidate and some information on what the format of the invalidate including some magic routing info. it_busno get overloaded with this magic routing info and it_index with the MMIO address for the invalidate command. This then gets hooked into the building and freeing of TCEs. This is only useful on bare metal pseries. pHyp takes care of this when virtualised. Based on patch from Milton with cleanups from Mikey. Signed-off-by: Milton Miller <miltonm@bga.com> Signed-off-by: Michael Neuling <mikey@neuling.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | powerpc/time: Optimise decrementer_check_overflowAnton Blanchard2011-11-253-21/+17
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | decrementer_check_overflow is called from arch_local_irq_restore so we want to make it as light weight as possible. As such, turn decrementer_check_overflow into an inline function. To avoid a circular mess of includes, separate out the two components of struct decrementer_clock and keep the struct clock_event_device part local to time.c. The fast path improves from: arch_local_irq_restore 0: mflr r0 4: std r0,16(r1) 8: stdu r1,-112(r1) c: stb r3,578(r13) 10: cmpdi cr7,r3,0 14: beq- cr7,24 <.arch_local_irq_restore+0x24> ... 24: addi r1,r1,112 28: ld r0,16(r1) 2c: mtlr r0 30: blr to: arch_local_irq_restore 0: std r30,-16(r1) 4: ld r30,0(r2) 8: stb r3,578(r13) c: cmpdi cr7,r3,0 10: beq- cr7,6c <.arch_local_irq_restore+0x6c> ... 6c: ld r30,-16(r1) 70: blr Unfortunately we still setup a local TOC (due to -mminimal-toc). Yet another sign we should be moving to -mcmodel=medium. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | powerpc/time: Fix some style issuesAnton Blanchard2011-11-251-11/+11
| | | | | | | | | | | | | | | | Fix some formatting issues and use the DECREMENTER_MAX define instead of 0x7fffffff. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | powerpc/time: Remove unnecessary sanity check of decrementer expirationAnton Blanchard2011-11-251-11/+3
| | | | | | | | | | | | | | | | | | | | | | The clockevents code uses max_delta_ns to avoid calling a clockevent with too large a value. Remove the redundant version of this in the timer_interrupt code. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | powerpc/time: Use clocksource_register_hzAnton Blanchard2011-11-251-10/+3
| | | | | | | | | | | | | | | | | | | | Use clocksource_register_hz which calculates the shift/mult factors for us. Also remove the shift = 22 assumption in vsyscall_update - thanks to Paul Mackerras and John Stultz for catching that. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | powerpc/time: Use clockevents_calc_mult_shiftAnton Blanchard2011-11-251-28/+2
| | | | | | | | | | | | | | | | We can use clockevents_calc_mult_shift instead of doing all the work ourselves. Signed-off-by: Anton Blanchard <anton@samba.org> Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* | powerpc/time: Handle wrapping of decrementerAnton Blanchard2011-11-253-9/+17
|/ | | | | | | | | | | | | | | | | | | | | When re-enabling interrupts we have code to handle edge sensitive decrementers by resetting the decrementer to 1 whenever it is negative. If interrupts were disabled long enough that the decrementer wrapped to positive we do nothing. This means interrupts can be delayed for a long time until it finally goes negative again. While we hope interrupts are never be disabled long enough for the decrementer to go positive, we have a very good test team that can drive any kernel into the ground. The softlockup data we get back from these fails could be seconds in the future, completely missing the cause of the lockup. We already keep track of the timebase of the next event so use that to work out if we should trigger a decrementer exception. Signed-off-by: Anton Blanchard <anton@samba.org> Cc: stable@kernel.org Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
* Linux 3.2-rc3Linus Torvalds2011-11-231-1/+1
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* Merge git://github.com/rustyrussell/linuxLinus Torvalds2011-11-235-3/+23
|\ | | | | | | | | | | | | * git://github.com/rustyrussell/linux: virtio-pci: make reset operation safer virtio-mmio: Correct the name of the guest features selector virtio: add HAS_IOMEM dependency to MMIO platform bus driver
| * virtio-pci: make reset operation saferMichael S. Tsirkin2011-11-242-0/+20
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | virtio pci device reset actually just does an I/O write, which in PCI is really posted, that is it can complete on CPU before the device has received it. Further, interrupts might have been pending on another CPU, so device callback might get invoked after reset. This conflicts with how drivers use reset, which is typically: reset unregister a callback running after reset completed can race with unregister, potentially leading to use after free bugs. Fix by flushing out the write, and flushing pending interrupts. This assumes that device is never reset from its vq/config callbacks, or in parallel with being added/removed, document this assumption. Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
| * virtio-mmio: Correct the name of the guest features selectorSasha Levin2011-11-242-2/+2
| | | | | | | | | | | | | | | | | | | | Guest features selector spelling mistake. Cc: Pawel Moll <pawel.moll@arm.com> Cc: Rusty Russell <rusty@rustcorp.com.au> Cc: virtualization@lists.linux-foundation.org Signed-off-by: Sasha Levin <levinsasha928@gmail.com> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
| * virtio: add HAS_IOMEM dependency to MMIO platform bus driverHeiko Carstens2011-11-241-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | Fix this compile error on s390: CC [M] drivers/virtio/virtio_mmio.o drivers/virtio/virtio_mmio.c: In function 'vm_get_features': drivers/virtio/virtio_mmio.c:107:2: error: implicit declaration of function 'writel' Cc: Christian Borntraeger <borntraeger@de.ibm.com> Signed-off-by: Heiko Carstens <heiko.carstens@de.ibm.com> Acked-by: Pawel Moll <pawel.moll@arm.com> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
* | Merge branch 'upstream-linus' of git://github.com/jgarzik/libata-devLinus Torvalds2011-11-232-1/+5
|\ \ | | | | | | | | | | | | | | | * 'upstream-linus' of git://github.com/jgarzik/libata-dev: libata: fix build without BMDMA [libata] ahci_platform: fix DT probing
| * | libata: fix build without BMDMAAlexander Beregalov2011-11-171-0/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | fix these errors: drivers/ata/libata-sff.c:2538:3: error: implicit declaration of function 'ata_pci_bmdma_prepare_host' drivers/ata/libata-sff.c:2549:40: error: 'ata_bmdma_interrupt' undeclared (first use in this function) Signed-off-by: Alexander Beregalov <a.beregalov@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
| * | [libata] ahci_platform: fix DT probingRob Herring2011-11-171-1/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The change in commit 904c04feaf13ed "ahci_platform: Add the board_ids..." doesn't work for the DT probing case as platform_get_device_id returns NULL. Pick the default ahci_port_info in this case. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Anton Vorontsov <cbouatmailru@gmail.com> Cc: Richard Zhu <richard.zhu@linaro.org> Cc: linux-ide@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
* | | Merge branch 'for-linus' of ↵Linus Torvalds2011-11-238-25/+51
|\ \ \ | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci * 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci: PCI hotplug: shpchp: don't blindly claim non-AMD 0x7450 device IDs PCI: pciehp: wait 100 ms after Link Training check PCI: pciehp: wait 1000 ms before Link Training check PCI: pciehp: Retrieve link speed after link is trained PCI: Let PCI_PRI depend on PCI PCI: Fix compile errors with PCI_ATS and !PCI_IOV PCI / ACPI: Make acpiphp ignore root bridges using PCIe native hotplug
| * | | PCI hotplug: shpchp: don't blindly claim non-AMD 0x7450 device IDsBjorn Helgaas2011-11-142-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | Previously we claimed device ID 0x7450, regardless of the vendor, which is clearly wrong. Now we'll claim that device ID only for AMD. I suspect this was just a typo in the original code, but it's possible this change will break shpchp on non-7450 AMD bridges. If so, we'll have to fix them as we find them. Reference: http://bugs.debian.org/cgi-bin/bugreport.cgi?bug=638863 Reported-by: Ralf Jung <ralfjung-e@gmx.de> Cc: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * | | PCI: pciehp: wait 100 ms after Link Training checkKenji Kaneshige2011-11-111-0/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the port supports Link speeds greater than 5.0 GT/s, we must wait for 100 ms after Link training completes before sending configuration request. Acked-by: Yinghai Lu <yinghai@kernel.org> Tested-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * | | PCI: pciehp: wait 1000 ms before Link Training checkKenji Kaneshige2011-11-112-3/+8
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | We need to wait for 1000 ms after Data Link Layer Link Active (DLLLA) bit reads 1b before sending configuration request. Currently pciehp does this wait after checking Link Training (LT) bit. But we need it before checking LT bit because LT is still set even after DLLLA bit is set on some platforms. Acked-by: Yinghai Lu <yinghai@kernel.org> Tested-by: Yinghai Lu <yinghai@kernel.org> Signed-off-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * | | PCI: pciehp: Retrieve link speed after link is trainedYinghai Lu2011-11-071-9/+2
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | During hot plug, board_added will call pciehp_power_on_slot(). But link speed is updated in pciehp_power_on_slot(). We should not update link speed there, because that is too early. So move the link speed update to pciehp_check_link_status() after making sure the link has been trained. -v2: fix compile warning that Kenji found. Signed-off-by: Yinghai Lu <yinghai.lu@oracle.com> Reviewed-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Tested-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * | | PCI: Let PCI_PRI depend on PCIJoerg Roedel2011-10-311-0/+1
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | This avoids the PCI_PRI question in 'make config' when PCI is not selected. Reported-by: Geert Uytterhoeven <geert@linux-m68k.org> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * | | PCI: Fix compile errors with PCI_ATS and !PCI_IOVJoerg Roedel2011-10-312-4/+4
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | The ats and sroiv members of 'struct pci_dev' are required for the ATS code already, even without IOV support compiled in. So depend on ATS here. This is fine with PCI_IOV too because it selects PCI_ATS. Also the prototypes for ATS need to be available for PCI_ATS. Reported-by: Randy Dunlap <rdunlap@xenotime.net> Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
| * | | PCI / ACPI: Make acpiphp ignore root bridges using PCIe native hotplugRafael J. Wysocki2011-10-311-5/+24
| | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | | If the kernel has requested control of the PCIe native hotplug feature for a given root complex, the acpiphp driver should not try to handle that root complex and it should leave it to pciehp. Failing to do so causes problems to happen if acpiphp is loaded before pciehp on such systems. To address this issue make find_root_bridges() ignore PCIe root complexes with PCIe native hotplug enabled and make add_bridge() return error code if PCIe native hotplug is enabled for the given root port. This causes acpiphp to refuse to load if PCIe native hotplug is enabled for all complexes and to refuse binding to the root complexes with PCIe native hotplug is enabled. Acked-by: Kenji Kaneshige <kaneshige.kenji@jp.fujitsu.com> Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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