diff options
Diffstat (limited to 'include/asm-arm/arch-s3c2410')
| -rw-r--r-- | include/asm-arm/arch-s3c2410/irqs.h | 2 | ||||
| -rw-r--r-- | include/asm-arm/arch-s3c2410/map.h | 4 | ||||
| -rw-r--r-- | include/asm-arm/arch-s3c2410/regs-gpioj.h | 4 | ||||
| -rw-r--r-- | include/asm-arm/arch-s3c2410/regs-s3c2412.h | 21 | ||||
| -rw-r--r-- | include/asm-arm/arch-s3c2410/regs-spi.h | 2 |
5 files changed, 32 insertions, 1 deletions
diff --git a/include/asm-arm/arch-s3c2410/irqs.h b/include/asm-arm/arch-s3c2410/irqs.h index c79cb1819913..3b49cd1c345c 100644 --- a/include/asm-arm/arch-s3c2410/irqs.h +++ b/include/asm-arm/arch-s3c2410/irqs.h @@ -124,7 +124,7 @@ #define IRQ_S3C2443_DMA S3C2410_IRQ(17) /* IRQ_DMA1 */ #define IRQ_S3C2443_UART3 S3C2410_IRQ(18) /* IRQ_DMA2 */ #define IRQ_S3C2443_CFCON S3C2410_IRQ(19) /* IRQ_DMA3 */ -#define IRQ_S3C2443_SDI1 S3C2410_IRQ(20) /* IRQ_SDI */ +#define IRQ_S3C2443_HSMMC S3C2410_IRQ(20) /* IRQ_SDI */ #define IRQ_S3C2443_NAND S3C2410_IRQ(24) /* reserved */ #define IRQ_S3C2443_LCD1 S3C2410_IRQSUB(14) diff --git a/include/asm-arm/arch-s3c2410/map.h b/include/asm-arm/arch-s3c2410/map.h index 4505aefbad17..19e77f038042 100644 --- a/include/asm-arm/arch-s3c2410/map.h +++ b/include/asm-arm/arch-s3c2410/map.h @@ -153,6 +153,10 @@ #define S3C2440_PA_AC97 (0x5B000000) #define S3C2440_SZ_AC97 SZ_1M +/* S3C2443 High-speed SD/MMC */ +#define S3C2443_PA_HSMMC (0x4A800000) +#define S3C2443_SZ_HSMMC (256) + /* ISA style IO, for each machine to sort out mappings for, if it * implements it. We reserve two 16M regions for ISA. */ diff --git a/include/asm-arm/arch-s3c2410/regs-gpioj.h b/include/asm-arm/arch-s3c2410/regs-gpioj.h index 02131a5a1d3a..0362332faaf0 100644 --- a/include/asm-arm/arch-s3c2410/regs-gpioj.h +++ b/include/asm-arm/arch-s3c2410/regs-gpioj.h @@ -98,5 +98,9 @@ #define S3C2440_GPJ12_OUTP (0x01 << 24) #define S3C2440_GPJ12_CAMRESET (0x02 << 24) +#define S3C2443_GPJ13 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 13) +#define S3C2443_GPJ14 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 14) +#define S3C2443_GPJ15 S3C2410_GPIONO(S3C2440_GPIO_BANKJ, 15) + #endif /* __ASM_ARCH_REGS_GPIOJ_H */ diff --git a/include/asm-arm/arch-s3c2410/regs-s3c2412.h b/include/asm-arm/arch-s3c2410/regs-s3c2412.h new file mode 100644 index 000000000000..8ca6a3bc8555 --- /dev/null +++ b/include/asm-arm/arch-s3c2410/regs-s3c2412.h @@ -0,0 +1,21 @@ +/* linux/include/asm-arm/arch-s3c2410/regs-s3c2412.h + * + * Copyright 2007 Simtec Electronics + * http://armlinux.simtec.co.uk/ + * Ben Dooks <ben@simtec.co.uk> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * S3C2412 specific register definitions +*/ + +#ifndef __ASM_ARCH_REGS_S3C2412_H +#define __ASM_ARCH_REGS_S3C2412_H "s3c2412" + +#define S3C2412_SWRST (S3C24XX_VA_CLKPWR + 0x30) +#define S3C2412_SWRST_RESET (0x533C2412) + +#endif /* __ASM_ARCH_REGS_S3C2412_H */ + diff --git a/include/asm-arm/arch-s3c2410/regs-spi.h b/include/asm-arm/arch-s3c2410/regs-spi.h index 3552280d1e8f..4a499a138256 100644 --- a/include/asm-arm/arch-s3c2410/regs-spi.h +++ b/include/asm-arm/arch-s3c2410/regs-spi.h @@ -12,6 +12,8 @@ #ifndef __ASM_ARCH_REGS_SPI_H #define __ASM_ARCH_REGS_SPI_H +#define S3C2410_SPI1 (0x20) +#define S3C2412_SPI1 (0x100) #define S3C2410_SPCON (0x00) |
