diff options
Diffstat (limited to 'drivers/mmc/host/dw_mmc-pltfm.c')
-rw-r--r-- | drivers/mmc/host/dw_mmc-pltfm.c | 57 |
1 files changed, 0 insertions, 57 deletions
diff --git a/drivers/mmc/host/dw_mmc-pltfm.c b/drivers/mmc/host/dw_mmc-pltfm.c index 1cd02828e5a3..8b6572162ed9 100644 --- a/drivers/mmc/host/dw_mmc-pltfm.c +++ b/drivers/mmc/host/dw_mmc-pltfm.c @@ -26,64 +26,11 @@ #include "dw_mmc.h" #include "dw_mmc-pltfm.h" -#define RK3288_CLKGEN_DIV 2 - static void dw_mci_pltfm_prepare_command(struct dw_mci *host, u32 *cmdr) { *cmdr |= SDMMC_CMD_USE_HOLD_REG; } -static int dw_mci_rk3288_setup_clock(struct dw_mci *host) -{ - host->bus_hz /= RK3288_CLKGEN_DIV; - - return 0; -} - -static void dw_mci_rk3288_set_ios(struct dw_mci *host, struct mmc_ios *ios) -{ - int ret; - unsigned int cclkin; - u32 bus_hz; - - /* - * cclkin: source clock of mmc controller. - * bus_hz: card interface clock generated by CLKGEN. - * bus_hz = cclkin / RK3288_CLKGEN_DIV; - * ios->clock = (div == 0) ? bus_hz : (bus_hz / (2 * div)) - * - * Note: div can only be 0 or 1 - * if DDR50 8bit mode(only emmc work in 8bit mode), - * div must be set 1 - */ - if ((ios->bus_width == MMC_BUS_WIDTH_8) && - (ios->timing == MMC_TIMING_MMC_DDR52)) - cclkin = 2 * ios->clock * RK3288_CLKGEN_DIV; - else - cclkin = ios->clock * RK3288_CLKGEN_DIV; - - ret = clk_set_rate(host->ciu_clk, cclkin); - if (ret) - dev_warn(host->dev, "failed to set rate %uHz\n", ios->clock); - - bus_hz = clk_get_rate(host->ciu_clk) / RK3288_CLKGEN_DIV; - if (bus_hz != host->bus_hz) { - host->bus_hz = bus_hz; - /* force dw_mci_setup_bus() */ - host->current_speed = 0; - } -} - -static const struct dw_mci_drv_data rk2928_drv_data = { - .prepare_command = dw_mci_pltfm_prepare_command, -}; - -static const struct dw_mci_drv_data rk3288_drv_data = { - .prepare_command = dw_mci_pltfm_prepare_command, - .set_ios = dw_mci_rk3288_set_ios, - .setup_clock = dw_mci_rk3288_setup_clock, -}; - static const struct dw_mci_drv_data socfpga_drv_data = { .prepare_command = dw_mci_pltfm_prepare_command, }; @@ -141,10 +88,6 @@ EXPORT_SYMBOL_GPL(dw_mci_pltfm_pmops); static const struct of_device_id dw_mci_pltfm_match[] = { { .compatible = "snps,dw-mshc", }, - { .compatible = "rockchip,rk2928-dw-mshc", - .data = &rk2928_drv_data }, - { .compatible = "rockchip,rk3288-dw-mshc", - .data = &rk3288_drv_data }, { .compatible = "altr,socfpga-dw-mshc", .data = &socfpga_drv_data }, {}, |