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path: root/drivers/clk/mxs/clk-imx23.c
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Diffstat (limited to 'drivers/clk/mxs/clk-imx23.c')
-rw-r--r--drivers/clk/mxs/clk-imx23.c11
1 files changed, 8 insertions, 3 deletions
diff --git a/drivers/clk/mxs/clk-imx23.c b/drivers/clk/mxs/clk-imx23.c
index 9fc9359f5133..a084566cf7e2 100644
--- a/drivers/clk/mxs/clk-imx23.c
+++ b/drivers/clk/mxs/clk-imx23.c
@@ -46,11 +46,13 @@ static void __iomem *digctrl;
#define BP_CLKSEQ_BYPASS_SAIF 0
#define BP_CLKSEQ_BYPASS_SSP 5
#define BP_SAIF_DIV_FRAC_EN 16
-#define BP_FRAC_IOFRAC 24
+
+#define FRAC_IO 3
static void __init clk_misc_init(void)
{
u32 val;
+ u8 frac;
/* Gate off cpu clock in WFI for power saving */
writel_relaxed(1 << BP_CPU_INTERRUPT_WAIT, CPU + SET);
@@ -72,9 +74,12 @@ static void __init clk_misc_init(void)
/*
* 480 MHz seems too high to be ssp clock source directly,
* so set frac to get a 288 MHz ref_io.
+ * According to reference manual we must access frac bytewise.
*/
- writel_relaxed(0x3f << BP_FRAC_IOFRAC, FRAC + CLR);
- writel_relaxed(30 << BP_FRAC_IOFRAC, FRAC + SET);
+ frac = readb_relaxed(FRAC + FRAC_IO);
+ frac &= ~0x3f;
+ frac |= 30;
+ writeb_relaxed(frac, FRAC + FRAC_IO);
}
static const char *sel_pll[] __initconst = { "pll", "ref_xtal", };
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