diff options
Diffstat (limited to 'arch/blackfin/mach-common')
| -rw-r--r-- | arch/blackfin/mach-common/clocks-init.c | 3 | ||||
| -rw-r--r-- | arch/blackfin/mach-common/entry.S | 9 | ||||
| -rw-r--r-- | arch/blackfin/mach-common/head.S | 84 | ||||
| -rw-r--r-- | arch/blackfin/mach-common/interrupt.S | 2 | ||||
| -rw-r--r-- | arch/blackfin/mach-common/ints-priority.c | 11 | ||||
| -rw-r--r-- | arch/blackfin/mach-common/pm.c | 11 |
6 files changed, 54 insertions, 66 deletions
diff --git a/arch/blackfin/mach-common/clocks-init.c b/arch/blackfin/mach-common/clocks-init.c index 5d182abefc7b..9dddb6f8cc85 100644 --- a/arch/blackfin/mach-common/clocks-init.c +++ b/arch/blackfin/mach-common/clocks-init.c @@ -14,6 +14,7 @@ #include <asm/clocks.h> #include <asm/mem_init.h> +#define SDGCTL_WIDTH (1 << 31) /* SDRAM external data path width */ #define PLL_CTL_VAL \ (((CONFIG_VCO_MULT & 63) << 9) | CLKIN_HALF | \ (PLL_BYPASS << 8) | (ANOMALY_05000265 ? 0x8000 : 0)) @@ -76,7 +77,7 @@ void init_clocks(void) bfin_write_PLL_DIV(CONFIG_CCLK_ACT_DIV | CONFIG_SCLK_DIV); #ifdef EBIU_SDGCTL bfin_write_EBIU_SDRRC(mem_SDRRC); - bfin_write_EBIU_SDGCTL(mem_SDGCTL); + bfin_write_EBIU_SDGCTL((bfin_read_EBIU_SDGCTL() & SDGCTL_WIDTH) | mem_SDGCTL); #else bfin_write_EBIU_RSTCTL(bfin_read_EBIU_RSTCTL() & ~(SRREQ)); do_sync(); diff --git a/arch/blackfin/mach-common/entry.S b/arch/blackfin/mach-common/entry.S index fae774651374..88de053bbe8e 100644 --- a/arch/blackfin/mach-common/entry.S +++ b/arch/blackfin/mach-common/entry.S @@ -151,13 +151,6 @@ ENTRY(_ex_syscall) jump.s _bfin_return_from_exception; ENDPROC(_ex_syscall) -ENTRY(_ex_soft_bp) - r7 = retx; - r7 += -2; - retx = r7; - jump.s _ex_trap_c; -ENDPROC(_ex_soft_bp) - ENTRY(_ex_single_step) /* If we just returned from an interrupt, the single step event is for the RTI instruction. */ @@ -1087,7 +1080,7 @@ ENTRY(_ex_table) * EXCPT instruction can provide 4 bits of EXCAUSE, allowing 16 to be user defined */ .long _ex_syscall /* 0x00 - User Defined - Linux Syscall */ - .long _ex_soft_bp /* 0x01 - User Defined - Software breakpoint */ + .long _ex_trap_c /* 0x01 - User Defined - Software breakpoint */ #ifdef CONFIG_KGDB .long _ex_trap_c /* 0x02 - User Defined - KGDB initial connection and break signal trap */ diff --git a/arch/blackfin/mach-common/head.S b/arch/blackfin/mach-common/head.S index e1e42c029e15..698d4c05947e 100644 --- a/arch/blackfin/mach-common/head.S +++ b/arch/blackfin/mach-common/head.S @@ -17,6 +17,19 @@ __INIT +ENTRY(__init_clear_bss) + r2 = r2 - r1; + cc = r2 == 0; + if cc jump .L_bss_done; + r2 >>= 2; + p1 = r1; + p2 = r2; + lsetup (1f, 1f) lc0 = p2; +1: [p1++] = r0; +.L_bss_done: + rts; +ENDPROC(__init_clear_bss) + #define INITIAL_STACK (L1_SCRATCH_START + L1_SCRATCH_LENGTH - 12) ENTRY(__start) @@ -144,6 +157,35 @@ ENTRY(__start) call _init_early_exception_vectors; #endif + r0 = 0 (x); + /* Zero out all of the fun bss regions */ +#if L1_DATA_A_LENGTH > 0 + r1.l = __sbss_l1; + r1.h = __sbss_l1; + r2.l = __ebss_l1; + r2.h = __ebss_l1; + call __init_clear_bss +#endif +#if L1_DATA_B_LENGTH > 0 + r1.l = __sbss_b_l1; + r1.h = __sbss_b_l1; + r2.l = __ebss_b_l1; + r2.h = __ebss_b_l1; + call __init_clear_bss +#endif +#if L2_LENGTH > 0 + r1.l = __sbss_l2; + r1.h = __sbss_l2; + r2.l = __ebss_l2; + r2.h = __ebss_l2; + call __init_clear_bss +#endif + r1.l = ___bss_start; + r1.h = ___bss_start; + r2.l = ___bss_stop; + r2.h = ___bss_stop; + call __init_clear_bss + /* Put The Code for PLL Programming and SDRAM Programming in L1 ISRAM */ call _bfin_relocate_l1_mem; #ifdef CONFIG_BFIN_KERNEL_CLOCK @@ -185,19 +227,6 @@ ENDPROC(__start) # define WDOG_CTL WDOGA_CTL #endif -ENTRY(__init_clear_bss) - r2 = r2 - r1; - cc = r2 == 0; - if cc jump .L_bss_done; - r2 >>= 2; - p1 = r1; - p2 = r2; - lsetup (1f, 1f) lc0 = p2; -1: [p1++] = r0; -.L_bss_done: - rts; -ENDPROC(__init_clear_bss) - ENTRY(_real_start) /* Enable nested interrupts */ [--sp] = reti; @@ -209,35 +238,6 @@ ENTRY(_real_start) w[p0] = r0; ssync; - r0 = 0 (x); - /* Zero out all of the fun bss regions */ -#if L1_DATA_A_LENGTH > 0 - r1.l = __sbss_l1; - r1.h = __sbss_l1; - r2.l = __ebss_l1; - r2.h = __ebss_l1; - call __init_clear_bss -#endif -#if L1_DATA_B_LENGTH > 0 - r1.l = __sbss_b_l1; - r1.h = __sbss_b_l1; - r2.l = __ebss_b_l1; - r2.h = __ebss_b_l1; - call __init_clear_bss -#endif -#if L2_LENGTH > 0 - r1.l = __sbss_l2; - r1.h = __sbss_l2; - r2.l = __ebss_l2; - r2.h = __ebss_l2; - call __init_clear_bss -#endif - r1.l = ___bss_start; - r1.h = ___bss_start; - r2.l = ___bss_stop; - r2.h = ___bss_stop; - call __init_clear_bss - /* Pass the u-boot arguments to the global value command line */ R0 = R7; call _cmdline_init; diff --git a/arch/blackfin/mach-common/interrupt.S b/arch/blackfin/mach-common/interrupt.S index 473df0f7fa78..43c4eb9acb65 100644 --- a/arch/blackfin/mach-common/interrupt.S +++ b/arch/blackfin/mach-common/interrupt.S @@ -195,7 +195,7 @@ ENDPROC(_evt_ivhw) /* Interrupt routine for evt2 (NMI). * We don't actually use this, so just return. * For inner circle type details, please see: - * http://docs.blackfin.uclinux.org/doku.php?id=linux:nmi + * http://docs.blackfin.uclinux.org/doku.php?id=linux-kernel:nmi */ ENTRY(_evt_nmi) .weak _evt_nmi diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c index 1bba6030dce9..202494568c6c 100644 --- a/arch/blackfin/mach-common/ints-priority.c +++ b/arch/blackfin/mach-common/ints-priority.c @@ -1101,10 +1101,9 @@ int __init init_arch_irq(void) IMASK_IVG14 | IMASK_IVG13 | IMASK_IVG12 | IMASK_IVG11 | IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW; -#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) \ - || defined(BF538_FAMILY) || defined(CONFIG_BF51x) +#ifdef SIC_IWR0 bfin_write_SIC_IWR0(IWR_DISABLE_ALL); -#if defined(CONFIG_BF52x) || defined(CONFIG_BF51x) +# ifdef SIC_IWR1 /* BF52x/BF51x system reset does not properly reset SIC_IWR1 which * will screw up the bootrom as it relies on MDMA0/1 waking it * up from IDLE instructions. See this report for more info: @@ -1114,10 +1113,8 @@ int __init init_arch_irq(void) bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11)); else bfin_write_SIC_IWR1(IWR_DISABLE_ALL); -#else - bfin_write_SIC_IWR1(IWR_DISABLE_ALL); -#endif -# ifdef CONFIG_BF54x +# endif +# ifdef SIC_IWR2 bfin_write_SIC_IWR2(IWR_DISABLE_ALL); # endif #else diff --git a/arch/blackfin/mach-common/pm.c b/arch/blackfin/mach-common/pm.c index d3d70fd67c16..f48a6aebb49b 100644 --- a/arch/blackfin/mach-common/pm.c +++ b/arch/blackfin/mach-common/pm.c @@ -82,10 +82,9 @@ void bfin_pm_suspend_standby_enter(void) bfin_pm_standby_restore(); -#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561) || \ - defined(CONFIG_BF538) || defined(CONFIG_BF539) || defined(CONFIG_BF51x) +#ifdef SIC_IWR0 bfin_write_SIC_IWR0(IWR_DISABLE_ALL); -#if defined(CONFIG_BF52x) || defined(CONFIG_BF51x) +# ifdef SIC_IWR1 /* BF52x system reset does not properly reset SIC_IWR1 which * will screw up the bootrom as it relies on MDMA0/1 waking it * up from IDLE instructions. See this report for more info: @@ -95,10 +94,8 @@ void bfin_pm_suspend_standby_enter(void) bfin_write_SIC_IWR1(IWR_ENABLE(10) | IWR_ENABLE(11)); else bfin_write_SIC_IWR1(IWR_DISABLE_ALL); -#else - bfin_write_SIC_IWR1(IWR_DISABLE_ALL); -#endif -# ifdef CONFIG_BF54x +# endif +# ifdef SIC_IWR2 bfin_write_SIC_IWR2(IWR_DISABLE_ALL); # endif #else |
