diff options
Diffstat (limited to 'arch/arm/mach-omap2/omap_hwmod_2420_data.c')
-rw-r--r-- | arch/arm/mach-omap2/omap_hwmod_2420_data.c | 892 |
1 files changed, 127 insertions, 765 deletions
diff --git a/arch/arm/mach-omap2/omap_hwmod_2420_data.c b/arch/arm/mach-omap2/omap_hwmod_2420_data.c index c4d0ae87d62a..6d7206213525 100644 --- a/arch/arm/mach-omap2/omap_hwmod_2420_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_2420_data.c @@ -1,7 +1,7 @@ /* * omap_hwmod_2420_data.c - hardware modules present on the OMAP2420 chips * - * Copyright (C) 2009-2010 Nokia Corporation + * Copyright (C) 2009-2011 Nokia Corporation * Paul Walmsley * * This program is free software; you can redistribute it and/or modify @@ -100,7 +100,6 @@ static struct omap_hwmod omap2420_l3_main_hwmod = { .masters_cnt = ARRAY_SIZE(omap2420_l3_main_masters), .slaves = omap2420_l3_main_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_l3_main_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), .flags = HWMOD_NO_IDLEST, }; @@ -114,38 +113,20 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod; static struct omap_hwmod omap2420_mcbsp2_hwmod; /* l4 core -> mcspi1 interface */ -static struct omap_hwmod_addr_space omap2420_mcspi1_addr_space[] = { - { - .pa_start = 0x48098000, - .pa_end = 0x480980ff, - .flags = ADDR_TYPE_RT, - }, -}; - static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi1 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_mcspi1_hwmod, .clk = "mcspi1_ick", - .addr = omap2420_mcspi1_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_mcspi1_addr_space), + .addr = omap2_mcspi1_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* l4 core -> mcspi2 interface */ -static struct omap_hwmod_addr_space omap2420_mcspi2_addr_space[] = { - { - .pa_start = 0x4809a000, - .pa_end = 0x4809a0ff, - .flags = ADDR_TYPE_RT, - }, -}; - static struct omap_hwmod_ocp_if omap2420_l4_core__mcspi2 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_mcspi2_hwmod, .clk = "mcspi2_ick", - .addr = omap2420_mcspi2_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_mcspi2_addr_space), + .addr = omap2_mcspi2_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -157,95 +138,47 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__l4_wkup = { }; /* L4 CORE -> UART1 interface */ -static struct omap_hwmod_addr_space omap2420_uart1_addr_space[] = { - { - .pa_start = OMAP2_UART1_BASE, - .pa_end = OMAP2_UART1_BASE + SZ_8K - 1, - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, - }, -}; - static struct omap_hwmod_ocp_if omap2_l4_core__uart1 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_uart1_hwmod, .clk = "uart1_ick", - .addr = omap2420_uart1_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_uart1_addr_space), + .addr = omap2xxx_uart1_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* L4 CORE -> UART2 interface */ -static struct omap_hwmod_addr_space omap2420_uart2_addr_space[] = { - { - .pa_start = OMAP2_UART2_BASE, - .pa_end = OMAP2_UART2_BASE + SZ_1K - 1, - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, - }, -}; - static struct omap_hwmod_ocp_if omap2_l4_core__uart2 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_uart2_hwmod, .clk = "uart2_ick", - .addr = omap2420_uart2_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_uart2_addr_space), + .addr = omap2xxx_uart2_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* L4 PER -> UART3 interface */ -static struct omap_hwmod_addr_space omap2420_uart3_addr_space[] = { - { - .pa_start = OMAP2_UART3_BASE, - .pa_end = OMAP2_UART3_BASE + SZ_1K - 1, - .flags = ADDR_MAP_ON_INIT | ADDR_TYPE_RT, - }, -}; - static struct omap_hwmod_ocp_if omap2_l4_core__uart3 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_uart3_hwmod, .clk = "uart3_ick", - .addr = omap2420_uart3_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_uart3_addr_space), + .addr = omap2xxx_uart3_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* I2C IP block address space length (in bytes) */ -#define OMAP2_I2C_AS_LEN 128 - /* L4 CORE -> I2C1 interface */ -static struct omap_hwmod_addr_space omap2420_i2c1_addr_space[] = { - { - .pa_start = 0x48070000, - .pa_end = 0x48070000 + OMAP2_I2C_AS_LEN - 1, - .flags = ADDR_TYPE_RT, - }, -}; - static struct omap_hwmod_ocp_if omap2420_l4_core__i2c1 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_i2c1_hwmod, .clk = "i2c1_ick", - .addr = omap2420_i2c1_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_i2c1_addr_space), + .addr = omap2_i2c1_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; /* L4 CORE -> I2C2 interface */ -static struct omap_hwmod_addr_space omap2420_i2c2_addr_space[] = { - { - .pa_start = 0x48072000, - .pa_end = 0x48072000 + OMAP2_I2C_AS_LEN - 1, - .flags = ADDR_TYPE_RT, - }, -}; - static struct omap_hwmod_ocp_if omap2420_l4_core__i2c2 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_i2c2_hwmod, .clk = "i2c2_ick", - .addr = omap2420_i2c2_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_i2c2_addr_space), + .addr = omap2_i2c2_addr_space, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -272,7 +205,6 @@ static struct omap_hwmod omap2420_l4_core_hwmod = { .masters_cnt = ARRAY_SIZE(omap2420_l4_core_masters), .slaves = omap2420_l4_core_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_l4_core_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), .flags = HWMOD_NO_IDLEST, }; @@ -293,7 +225,6 @@ static struct omap_hwmod omap2420_l4_wkup_hwmod = { .masters_cnt = ARRAY_SIZE(omap2420_l4_wkup_masters), .slaves = omap2420_l4_wkup_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_l4_wkup_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), .flags = HWMOD_NO_IDLEST, }; @@ -309,7 +240,6 @@ static struct omap_hwmod omap2420_mpu_hwmod = { .main_clk = "mpu_ck", .masters = omap2420_mpu_masters, .masters_cnt = ARRAY_SIZE(omap2420_mpu_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; /* @@ -337,32 +267,20 @@ static struct omap_hwmod omap2420_iva_hwmod = { .class = &iva_hwmod_class, .masters = omap2420_iva_masters, .masters_cnt = ARRAY_SIZE(omap2420_iva_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) }; -/* Timer Common */ -static struct omap_hwmod_class_sysconfig omap2420_timer_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_CLOCKACTIVITY | - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, +/* always-on timers dev attribute */ +static struct omap_timer_capability_dev_attr capability_alwon_dev_attr = { + .timer_capability = OMAP_TIMER_ALWON, }; -static struct omap_hwmod_class omap2420_timer_hwmod_class = { - .name = "timer", - .sysc = &omap2420_timer_sysc, - .rev = OMAP_TIMER_IP_VERSION_1, +/* pwm timers dev attribute */ +static struct omap_timer_capability_dev_attr capability_pwm_dev_attr = { + .timer_capability = OMAP_TIMER_HAS_PWM, }; /* timer1 */ static struct omap_hwmod omap2420_timer1_hwmod; -static struct omap_hwmod_irq_info omap2420_timer1_mpu_irqs[] = { - { .irq = 37, }, -}; static struct omap_hwmod_addr_space omap2420_timer1_addrs[] = { { @@ -370,6 +288,7 @@ static struct omap_hwmod_addr_space omap2420_timer1_addrs[] = { .pa_end = 0x48028000 + SZ_1K - 1, .flags = ADDR_TYPE_RT }, + { } }; /* l4_wkup -> timer1 */ @@ -378,7 +297,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__timer1 = { .slave = &omap2420_timer1_hwmod, .clk = "gpt1_ick", .addr = omap2420_timer1_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer1_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -390,8 +308,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer1_slaves[] = { /* timer1 hwmod */ static struct omap_hwmod omap2420_timer1_hwmod = { .name = "timer1", - .mpu_irqs = omap2420_timer1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer1_mpu_irqs), + .mpu_irqs = omap2_timer1_mpu_irqs, .main_clk = "gpt1_fck", .prcm = { .omap2 = { @@ -402,33 +319,21 @@ static struct omap_hwmod omap2420_timer1_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT1_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2420_timer1_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer1_slaves), - .class = &omap2420_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) + .class = &omap2xxx_timer_hwmod_class, }; /* timer2 */ static struct omap_hwmod omap2420_timer2_hwmod; -static struct omap_hwmod_irq_info omap2420_timer2_mpu_irqs[] = { - { .irq = 38, }, -}; - -static struct omap_hwmod_addr_space omap2420_timer2_addrs[] = { - { - .pa_start = 0x4802a000, - .pa_end = 0x4802a000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -}; /* l4_core -> timer2 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer2 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_timer2_hwmod, .clk = "gpt2_ick", - .addr = omap2420_timer2_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer2_addrs), + .addr = omap2xxx_timer2_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -440,8 +345,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer2_slaves[] = { /* timer2 hwmod */ static struct omap_hwmod omap2420_timer2_hwmod = { .name = "timer2", - .mpu_irqs = omap2420_timer2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer2_mpu_irqs), + .mpu_irqs = omap2_timer2_mpu_irqs, .main_clk = "gpt2_fck", .prcm = { .omap2 = { @@ -452,33 +356,21 @@ static struct omap_hwmod omap2420_timer2_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT2_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2420_timer2_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer2_slaves), - .class = &omap2420_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) + .class = &omap2xxx_timer_hwmod_class, }; /* timer3 */ static struct omap_hwmod omap2420_timer3_hwmod; -static struct omap_hwmod_irq_info omap2420_timer3_mpu_irqs[] = { - { .irq = 39, }, -}; - -static struct omap_hwmod_addr_space omap2420_timer3_addrs[] = { - { - .pa_start = 0x48078000, - .pa_end = 0x48078000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -}; /* l4_core -> timer3 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer3 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_timer3_hwmod, .clk = "gpt3_ick", - .addr = omap2420_timer3_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer3_addrs), + .addr = omap2xxx_timer3_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -490,8 +382,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer3_slaves[] = { /* timer3 hwmod */ static struct omap_hwmod omap2420_timer3_hwmod = { .name = "timer3", - .mpu_irqs = omap2420_timer3_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer3_mpu_irqs), + .mpu_irqs = omap2_timer3_mpu_irqs, .main_clk = "gpt3_fck", .prcm = { .omap2 = { @@ -502,33 +393,21 @@ static struct omap_hwmod omap2420_timer3_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT3_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2420_timer3_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer3_slaves), - .class = &omap2420_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) + .class = &omap2xxx_timer_hwmod_class, }; /* timer4 */ static struct omap_hwmod omap2420_timer4_hwmod; -static struct omap_hwmod_irq_info omap2420_timer4_mpu_irqs[] = { - { .irq = 40, }, -}; - -static struct omap_hwmod_addr_space omap2420_timer4_addrs[] = { - { - .pa_start = 0x4807a000, - .pa_end = 0x4807a000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -}; /* l4_core -> timer4 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer4 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_timer4_hwmod, .clk = "gpt4_ick", - .addr = omap2420_timer4_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer4_addrs), + .addr = omap2xxx_timer4_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -540,8 +419,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer4_slaves[] = { /* timer4 hwmod */ static struct omap_hwmod omap2420_timer4_hwmod = { .name = "timer4", - .mpu_irqs = omap2420_timer4_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer4_mpu_irqs), + .mpu_irqs = omap2_timer4_mpu_irqs, .main_clk = "gpt4_fck", .prcm = { .omap2 = { @@ -552,33 +430,21 @@ static struct omap_hwmod omap2420_timer4_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT4_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2420_timer4_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer4_slaves), - .class = &omap2420_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) + .class = &omap2xxx_timer_hwmod_class, }; /* timer5 */ static struct omap_hwmod omap2420_timer5_hwmod; -static struct omap_hwmod_irq_info omap2420_timer5_mpu_irqs[] = { - { .irq = 41, }, -}; - -static struct omap_hwmod_addr_space omap2420_timer5_addrs[] = { - { - .pa_start = 0x4807c000, - .pa_end = 0x4807c000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -}; /* l4_core -> timer5 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer5 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_timer5_hwmod, .clk = "gpt5_ick", - .addr = omap2420_timer5_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer5_addrs), + .addr = omap2xxx_timer5_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -590,8 +456,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer5_slaves[] = { /* timer5 hwmod */ static struct omap_hwmod omap2420_timer5_hwmod = { .name = "timer5", - .mpu_irqs = omap2420_timer5_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer5_mpu_irqs), + .mpu_irqs = omap2_timer5_mpu_irqs, .main_clk = "gpt5_fck", .prcm = { .omap2 = { @@ -602,34 +467,22 @@ static struct omap_hwmod omap2420_timer5_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT5_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2420_timer5_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer5_slaves), - .class = &omap2420_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) + .class = &omap2xxx_timer_hwmod_class, }; /* timer6 */ static struct omap_hwmod omap2420_timer6_hwmod; -static struct omap_hwmod_irq_info omap2420_timer6_mpu_irqs[] = { - { .irq = 42, }, -}; - -static struct omap_hwmod_addr_space omap2420_timer6_addrs[] = { - { - .pa_start = 0x4807e000, - .pa_end = 0x4807e000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -}; /* l4_core -> timer6 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer6 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_timer6_hwmod, .clk = "gpt6_ick", - .addr = omap2420_timer6_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer6_addrs), + .addr = omap2xxx_timer6_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -641,8 +494,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer6_slaves[] = { /* timer6 hwmod */ static struct omap_hwmod omap2420_timer6_hwmod = { .name = "timer6", - .mpu_irqs = omap2420_timer6_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer6_mpu_irqs), + .mpu_irqs = omap2_timer6_mpu_irqs, .main_clk = "gpt6_fck", .prcm = { .omap2 = { @@ -653,33 +505,21 @@ static struct omap_hwmod omap2420_timer6_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT6_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2420_timer6_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer6_slaves), - .class = &omap2420_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) + .class = &omap2xxx_timer_hwmod_class, }; /* timer7 */ static struct omap_hwmod omap2420_timer7_hwmod; -static struct omap_hwmod_irq_info omap2420_timer7_mpu_irqs[] = { - { .irq = 43, }, -}; - -static struct omap_hwmod_addr_space omap2420_timer7_addrs[] = { - { - .pa_start = 0x48080000, - .pa_end = 0x48080000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -}; /* l4_core -> timer7 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer7 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_timer7_hwmod, .clk = "gpt7_ick", - .addr = omap2420_timer7_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer7_addrs), + .addr = omap2xxx_timer7_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -691,8 +531,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer7_slaves[] = { /* timer7 hwmod */ static struct omap_hwmod omap2420_timer7_hwmod = { .name = "timer7", - .mpu_irqs = omap2420_timer7_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer7_mpu_irqs), + .mpu_irqs = omap2_timer7_mpu_irqs, .main_clk = "gpt7_fck", .prcm = { .omap2 = { @@ -703,33 +542,21 @@ static struct omap_hwmod omap2420_timer7_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT7_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2420_timer7_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer7_slaves), - .class = &omap2420_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) + .class = &omap2xxx_timer_hwmod_class, }; /* timer8 */ static struct omap_hwmod omap2420_timer8_hwmod; -static struct omap_hwmod_irq_info omap2420_timer8_mpu_irqs[] = { - { .irq = 44, }, -}; - -static struct omap_hwmod_addr_space omap2420_timer8_addrs[] = { - { - .pa_start = 0x48082000, - .pa_end = 0x48082000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -}; /* l4_core -> timer8 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer8 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_timer8_hwmod, .clk = "gpt8_ick", - .addr = omap2420_timer8_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer8_addrs), + .addr = omap2xxx_timer8_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -741,8 +568,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer8_slaves[] = { /* timer8 hwmod */ static struct omap_hwmod omap2420_timer8_hwmod = { .name = "timer8", - .mpu_irqs = omap2420_timer8_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer8_mpu_irqs), + .mpu_irqs = omap2_timer8_mpu_irqs, .main_clk = "gpt8_fck", .prcm = { .omap2 = { @@ -753,33 +579,21 @@ static struct omap_hwmod omap2420_timer8_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT8_SHIFT, }, }, + .dev_attr = &capability_alwon_dev_attr, .slaves = omap2420_timer8_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer8_slaves), - .class = &omap2420_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) + .class = &omap2xxx_timer_hwmod_class, }; /* timer9 */ static struct omap_hwmod omap2420_timer9_hwmod; -static struct omap_hwmod_irq_info omap2420_timer9_mpu_irqs[] = { - { .irq = 45, }, -}; - -static struct omap_hwmod_addr_space omap2420_timer9_addrs[] = { - { - .pa_start = 0x48084000, - .pa_end = 0x48084000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -}; /* l4_core -> timer9 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer9 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_timer9_hwmod, .clk = "gpt9_ick", - .addr = omap2420_timer9_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer9_addrs), + .addr = omap2xxx_timer9_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -791,8 +605,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer9_slaves[] = { /* timer9 hwmod */ static struct omap_hwmod omap2420_timer9_hwmod = { .name = "timer9", - .mpu_irqs = omap2420_timer9_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer9_mpu_irqs), + .mpu_irqs = omap2_timer9_mpu_irqs, .main_clk = "gpt9_fck", .prcm = { .omap2 = { @@ -803,33 +616,21 @@ static struct omap_hwmod omap2420_timer9_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT9_SHIFT, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap2420_timer9_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer9_slaves), - .class = &omap2420_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) + .class = &omap2xxx_timer_hwmod_class, }; /* timer10 */ static struct omap_hwmod omap2420_timer10_hwmod; -static struct omap_hwmod_irq_info omap2420_timer10_mpu_irqs[] = { - { .irq = 46, }, -}; - -static struct omap_hwmod_addr_space omap2420_timer10_addrs[] = { - { - .pa_start = 0x48086000, - .pa_end = 0x48086000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -}; /* l4_core -> timer10 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer10 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_timer10_hwmod, .clk = "gpt10_ick", - .addr = omap2420_timer10_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer10_addrs), + .addr = omap2_timer10_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -841,8 +642,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer10_slaves[] = { /* timer10 hwmod */ static struct omap_hwmod omap2420_timer10_hwmod = { .name = "timer10", - .mpu_irqs = omap2420_timer10_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer10_mpu_irqs), + .mpu_irqs = omap2_timer10_mpu_irqs, .main_clk = "gpt10_fck", .prcm = { .omap2 = { @@ -853,33 +653,21 @@ static struct omap_hwmod omap2420_timer10_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT10_SHIFT, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap2420_timer10_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer10_slaves), - .class = &omap2420_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) + .class = &omap2xxx_timer_hwmod_class, }; /* timer11 */ static struct omap_hwmod omap2420_timer11_hwmod; -static struct omap_hwmod_irq_info omap2420_timer11_mpu_irqs[] = { - { .irq = 47, }, -}; - -static struct omap_hwmod_addr_space omap2420_timer11_addrs[] = { - { - .pa_start = 0x48088000, - .pa_end = 0x48088000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -}; /* l4_core -> timer11 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer11 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_timer11_hwmod, .clk = "gpt11_ick", - .addr = omap2420_timer11_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer11_addrs), + .addr = omap2_timer11_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -891,8 +679,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer11_slaves[] = { /* timer11 hwmod */ static struct omap_hwmod omap2420_timer11_hwmod = { .name = "timer11", - .mpu_irqs = omap2420_timer11_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer11_mpu_irqs), + .mpu_irqs = omap2_timer11_mpu_irqs, .main_clk = "gpt11_fck", .prcm = { .omap2 = { @@ -903,33 +690,21 @@ static struct omap_hwmod omap2420_timer11_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT11_SHIFT, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap2420_timer11_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer11_slaves), - .class = &omap2420_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) + .class = &omap2xxx_timer_hwmod_class, }; /* timer12 */ static struct omap_hwmod omap2420_timer12_hwmod; -static struct omap_hwmod_irq_info omap2420_timer12_mpu_irqs[] = { - { .irq = 48, }, -}; - -static struct omap_hwmod_addr_space omap2420_timer12_addrs[] = { - { - .pa_start = 0x4808a000, - .pa_end = 0x4808a000 + SZ_1K - 1, - .flags = ADDR_TYPE_RT - }, -}; /* l4_core -> timer12 */ static struct omap_hwmod_ocp_if omap2420_l4_core__timer12 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_timer12_hwmod, .clk = "gpt12_ick", - .addr = omap2420_timer12_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_timer12_addrs), + .addr = omap2xxx_timer12_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -941,8 +716,7 @@ static struct omap_hwmod_ocp_if *omap2420_timer12_slaves[] = { /* timer12 hwmod */ static struct omap_hwmod omap2420_timer12_hwmod = { .name = "timer12", - .mpu_irqs = omap2420_timer12_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_timer12_mpu_irqs), + .mpu_irqs = omap2xxx_timer12_mpu_irqs, .main_clk = "gpt12_fck", .prcm = { .omap2 = { @@ -953,10 +727,10 @@ static struct omap_hwmod omap2420_timer12_hwmod = { .idlest_idle_bit = OMAP24XX_ST_GPT12_SHIFT, }, }, + .dev_attr = &capability_pwm_dev_attr, .slaves = omap2420_timer12_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_timer12_slaves), - .class = &omap2420_timer_hwmod_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420) + .class = &omap2xxx_timer_hwmod_class, }; /* l4_wkup -> wd_timer2 */ @@ -966,6 +740,7 @@ static struct omap_hwmod_addr_space omap2420_wd_timer2_addrs[] = { .pa_end = 0x4802207f, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = { @@ -973,31 +748,9 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__wd_timer2 = { .slave = &omap2420_wd_timer2_hwmod, .clk = "mpu_wdt_ick", .addr = omap2420_wd_timer2_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_wd_timer2_addrs), .user = OCP_USER_MPU | OCP_USER_SDMA, }; -/* - * 'wd_timer' class - * 32-bit watchdog upward counter that generates a pulse on the reset pin on - * overflow condition - */ - -static struct omap_hwmod_class_sysconfig omap2420_wd_timer_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2420_wd_timer_hwmod_class = { - .name = "wd_timer", - .sysc = &omap2420_wd_timer_sysc, - .pre_shutdown = &omap2_wd_timer_disable -}; - /* wd_timer2 */ static struct omap_hwmod_ocp_if *omap2420_wd_timer2_slaves[] = { &omap2420_l4_wkup__wd_timer2, @@ -1005,7 +758,7 @@ static struct omap_hwmod_ocp_if *omap2420_wd_timer2_slaves[] = { static struct omap_hwmod omap2420_wd_timer2_hwmod = { .name = "wd_timer2", - .class = &omap2420_wd_timer_hwmod_class, + .class = &omap2xxx_wd_timer_hwmod_class, .main_clk = "mpu_wdt_fck", .prcm = { .omap2 = { @@ -1018,48 +771,18 @@ static struct omap_hwmod omap2420_wd_timer2_hwmod = { }, .slaves = omap2420_wd_timer2_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_wd_timer2_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), -}; - -/* UART */ - -static struct omap_hwmod_class_sysconfig uart_sysc = { - .rev_offs = 0x50, - .sysc_offs = 0x54, - .syss_offs = 0x58, - .sysc_flags = (SYSC_HAS_SIDLEMODE | - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class uart_class = { - .name = "uart", - .sysc = &uart_sysc, }; /* UART1 */ -static struct omap_hwmod_irq_info uart1_mpu_irqs[] = { - { .irq = INT_24XX_UART1_IRQ, }, -}; - -static struct omap_hwmod_dma_info uart1_sdma_reqs[] = { - { .name = "rx", .dma_req = OMAP24XX_DMA_UART1_RX, }, - { .name = "tx", .dma_req = OMAP24XX_DMA_UART1_TX, }, -}; - static struct omap_hwmod_ocp_if *omap2420_uart1_slaves[] = { &omap2_l4_core__uart1, }; static struct omap_hwmod omap2420_uart1_hwmod = { .name = "uart1", - .mpu_irqs = uart1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(uart1_mpu_irqs), - .sdma_reqs = uart1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart1_sdma_reqs), + .mpu_irqs = omap2_uart1_mpu_irqs, + .sdma_reqs = omap2_uart1_sdma_reqs, .main_clk = "uart1_fck", .prcm = { .omap2 = { @@ -1072,31 +795,19 @@ static struct omap_hwmod omap2420_uart1_hwmod = { }, .slaves = omap2420_uart1_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_uart1_slaves), - .class = &uart_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), + .class = &omap2_uart_class, }; /* UART2 */ -static struct omap_hwmod_irq_info uart2_mpu_irqs[] = { - { .irq = INT_24XX_UART2_IRQ, }, -}; - -static struct omap_hwmod_dma_info uart2_sdma_reqs[] = { - { .name = "rx", .dma_req = OMAP24XX_DMA_UART2_RX, }, - { .name = "tx", .dma_req = OMAP24XX_DMA_UART2_TX, }, -}; - static struct omap_hwmod_ocp_if *omap2420_uart2_slaves[] = { &omap2_l4_core__uart2, }; static struct omap_hwmod omap2420_uart2_hwmod = { .name = "uart2", - .mpu_irqs = uart2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(uart2_mpu_irqs), - .sdma_reqs = uart2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart2_sdma_reqs), + .mpu_irqs = omap2_uart2_mpu_irqs, + .sdma_reqs = omap2_uart2_sdma_reqs, .main_clk = "uart2_fck", .prcm = { .omap2 = { @@ -1109,31 +820,19 @@ static struct omap_hwmod omap2420_uart2_hwmod = { }, .slaves = omap2420_uart2_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_uart2_slaves), - .class = &uart_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), + .class = &omap2_uart_class, }; /* UART3 */ -static struct omap_hwmod_irq_info uart3_mpu_irqs[] = { - { .irq = INT_24XX_UART3_IRQ, }, -}; - -static struct omap_hwmod_dma_info uart3_sdma_reqs[] = { - { .name = "rx", .dma_req = OMAP24XX_DMA_UART3_RX, }, - { .name = "tx", .dma_req = OMAP24XX_DMA_UART3_TX, }, -}; - static struct omap_hwmod_ocp_if *omap2420_uart3_slaves[] = { &omap2_l4_core__uart3, }; static struct omap_hwmod omap2420_uart3_hwmod = { .name = "uart3", - .mpu_irqs = uart3_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(uart3_mpu_irqs), - .sdma_reqs = uart3_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(uart3_sdma_reqs), + .mpu_irqs = omap2_uart3_mpu_irqs, + .sdma_reqs = omap2_uart3_sdma_reqs, .main_clk = "uart3_fck", .prcm = { .omap2 = { @@ -1146,30 +845,7 @@ static struct omap_hwmod omap2420_uart3_hwmod = { }, .slaves = omap2420_uart3_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_uart3_slaves), - .class = &uart_class, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), -}; - -/* - * 'dss' class - * display sub-system - */ - -static struct omap_hwmod_class_sysconfig omap2420_dss_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2420_dss_hwmod_class = { - .name = "dss", - .sysc = &omap2420_dss_sysc, -}; - -static struct omap_hwmod_dma_info omap2420_dss_sdma_chs[] = { - { .name = "dispc", .dma_req = 5 }, + .class = &omap2_uart_class, }; /* dss */ @@ -1178,21 +854,12 @@ static struct omap_hwmod_ocp_if *omap2420_dss_masters[] = { &omap2420_dss__l3, }; -static struct omap_hwmod_addr_space omap2420_dss_addrs[] = { - { - .pa_start = 0x48050000, - .pa_end = 0x480503FF, - .flags = ADDR_TYPE_RT - }, -}; - /* l4_core -> dss */ static struct omap_hwmod_ocp_if omap2420_l4_core__dss = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_dss_core_hwmod, .clk = "dss_ick", - .addr = omap2420_dss_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_dss_addrs), + .addr = omap2_dss_addrs, .fw = { .omap2 = { .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION, @@ -1214,10 +881,9 @@ static struct omap_hwmod_opt_clk dss_opt_clks[] = { static struct omap_hwmod omap2420_dss_core_hwmod = { .name = "dss_core", - .class = &omap2420_dss_hwmod_class, + .class = &omap2_dss_hwmod_class, .main_clk = "dss1_fck", /* instead of dss_fck */ - .sdma_reqs = omap2420_dss_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_dss_sdma_chs), + .sdma_reqs = omap2xxx_dss_sdma_chs, .prcm = { .omap2 = { .prcm_reg_id = 1, @@ -1233,50 +899,15 @@ static struct omap_hwmod omap2420_dss_core_hwmod = { .slaves_cnt = ARRAY_SIZE(omap2420_dss_slaves), .masters = omap2420_dss_masters, .masters_cnt = ARRAY_SIZE(omap2420_dss_masters), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), .flags = HWMOD_NO_IDLEST, }; -/* - * 'dispc' class - * display controller - */ - -static struct omap_hwmod_class_sysconfig omap2420_dispc_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_MIDLEMODE | - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART | - MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2420_dispc_hwmod_class = { - .name = "dispc", - .sysc = &omap2420_dispc_sysc, -}; - -static struct omap_hwmod_irq_info omap2420_dispc_irqs[] = { - { .irq = 25 }, -}; - -static struct omap_hwmod_addr_space omap2420_dss_dispc_addrs[] = { - { - .pa_start = 0x48050400, - .pa_end = 0x480507FF, - .flags = ADDR_TYPE_RT - }, -}; - /* l4_core -> dss_dispc */ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_dispc = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_dss_dispc_hwmod, .clk = "dss_ick", - .addr = omap2420_dss_dispc_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_dss_dispc_addrs), + .addr = omap2_dss_dispc_addrs, .fw = { .omap2 = { .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_DISPC_REGION, @@ -1293,9 +924,8 @@ static struct omap_hwmod_ocp_if *omap2420_dss_dispc_slaves[] = { static struct omap_hwmod omap2420_dss_dispc_hwmod = { .name = "dss_dispc", - .class = &omap2420_dispc_hwmod_class, - .mpu_irqs = omap2420_dispc_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_dispc_irqs), + .class = &omap2_dispc_hwmod_class, + .mpu_irqs = omap2_dispc_irqs, .main_clk = "dss1_fck", .prcm = { .omap2 = { @@ -1308,45 +938,15 @@ static struct omap_hwmod omap2420_dss_dispc_hwmod = { }, .slaves = omap2420_dss_dispc_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_dss_dispc_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), .flags = HWMOD_NO_IDLEST, }; -/* - * 'rfbi' class - * remote frame buffer interface - */ - -static struct omap_hwmod_class_sysconfig omap2420_rfbi_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2420_rfbi_hwmod_class = { - .name = "rfbi", - .sysc = &omap2420_rfbi_sysc, -}; - -static struct omap_hwmod_addr_space omap2420_dss_rfbi_addrs[] = { - { - .pa_start = 0x48050800, - .pa_end = 0x48050BFF, - .flags = ADDR_TYPE_RT - }, -}; - /* l4_core -> dss_rfbi */ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_rfbi = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_dss_rfbi_hwmod, .clk = "dss_ick", - .addr = omap2420_dss_rfbi_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_dss_rfbi_addrs), + .addr = omap2_dss_rfbi_addrs, .fw = { .omap2 = { .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION, @@ -1363,7 +963,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_rfbi_slaves[] = { static struct omap_hwmod omap2420_dss_rfbi_hwmod = { .name = "dss_rfbi", - .class = &omap2420_rfbi_hwmod_class, + .class = &omap2_rfbi_hwmod_class, .main_clk = "dss1_fck", .prcm = { .omap2 = { @@ -1374,35 +974,15 @@ static struct omap_hwmod omap2420_dss_rfbi_hwmod = { }, .slaves = omap2420_dss_rfbi_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_dss_rfbi_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), .flags = HWMOD_NO_IDLEST, }; -/* - * 'venc' class - * video encoder - */ - -static struct omap_hwmod_class omap2420_venc_hwmod_class = { - .name = "venc", -}; - -/* dss_venc */ -static struct omap_hwmod_addr_space omap2420_dss_venc_addrs[] = { - { - .pa_start = 0x48050C00, - .pa_end = 0x48050FFF, - .flags = ADDR_TYPE_RT - }, -}; - /* l4_core -> dss_venc */ static struct omap_hwmod_ocp_if omap2420_l4_core__dss_venc = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_dss_venc_hwmod, .clk = "dss_54m_fck", - .addr = omap2420_dss_venc_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_dss_venc_addrs), + .addr = omap2_dss_venc_addrs, .fw = { .omap2 = { .l4_fw_region = OMAP2420_L4_CORE_FW_DSS_VENC_REGION, @@ -1420,7 +1000,7 @@ static struct omap_hwmod_ocp_if *omap2420_dss_venc_slaves[] = { static struct omap_hwmod omap2420_dss_venc_hwmod = { .name = "dss_venc", - .class = &omap2420_venc_hwmod_class, + .class = &omap2_venc_hwmod_class, .main_clk = "dss1_fck", .prcm = { .omap2 = { @@ -1431,7 +1011,6 @@ static struct omap_hwmod omap2420_dss_venc_hwmod = { }, .slaves = omap2420_dss_venc_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_dss_venc_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), .flags = HWMOD_NO_IDLEST, }; @@ -1447,20 +1026,18 @@ static struct omap_hwmod_class_sysconfig i2c_sysc = { static struct omap_hwmod_class i2c_class = { .name = "i2c", .sysc = &i2c_sysc, + .rev = OMAP_I2C_IP_VERSION_1, + .reset = &omap_i2c_reset, }; -static struct omap_i2c_dev_attr i2c_dev_attr; - -/* I2C1 */ - -static struct omap_hwmod_irq_info i2c1_mpu_irqs[] = { - { .irq = INT_24XX_I2C1_IRQ, }, +static struct omap_i2c_dev_attr i2c_dev_attr = { + .flags = OMAP_I2C_FLAG_NO_FIFO | + OMAP_I2C_FLAG_SIMPLE_CLOCK | + OMAP_I2C_FLAG_16BIT_DATA_REG | + OMAP_I2C_FLAG_BUS_SHIFT_2, }; -static struct omap_hwmod_dma_info i2c1_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C1_TX }, - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C1_RX }, -}; +/* I2C1 */ static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = { &omap2420_l4_core__i2c1, @@ -1468,10 +1045,8 @@ static struct omap_hwmod_ocp_if *omap2420_i2c1_slaves[] = { static struct omap_hwmod omap2420_i2c1_hwmod = { .name = "i2c1", - .mpu_irqs = i2c1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(i2c1_mpu_irqs), - .sdma_reqs = i2c1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c1_sdma_reqs), + .mpu_irqs = omap2_i2c1_mpu_irqs, + .sdma_reqs = omap2_i2c1_sdma_reqs, .main_clk = "i2c1_fck", .prcm = { .omap2 = { @@ -1486,31 +1061,19 @@ static struct omap_hwmod omap2420_i2c1_hwmod = { .slaves_cnt = ARRAY_SIZE(omap2420_i2c1_slaves), .class = &i2c_class, .dev_attr = &i2c_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), .flags = HWMOD_16BIT_REG, }; /* I2C2 */ -static struct omap_hwmod_irq_info i2c2_mpu_irqs[] = { - { .irq = INT_24XX_I2C2_IRQ, }, -}; - -static struct omap_hwmod_dma_info i2c2_sdma_reqs[] = { - { .name = "tx", .dma_req = OMAP24XX_DMA_I2C2_TX }, - { .name = "rx", .dma_req = OMAP24XX_DMA_I2C2_RX }, -}; - static struct omap_hwmod_ocp_if *omap2420_i2c2_slaves[] = { &omap2420_l4_core__i2c2, }; static struct omap_hwmod omap2420_i2c2_hwmod = { .name = "i2c2", - .mpu_irqs = i2c2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(i2c2_mpu_irqs), - .sdma_reqs = i2c2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(i2c2_sdma_reqs), + .mpu_irqs = omap2_i2c2_mpu_irqs, + .sdma_reqs = omap2_i2c2_sdma_reqs, .main_clk = "i2c2_fck", .prcm = { .omap2 = { @@ -1525,7 +1088,6 @@ static struct omap_hwmod omap2420_i2c2_hwmod = { .slaves_cnt = ARRAY_SIZE(omap2420_i2c2_slaves), .class = &i2c_class, .dev_attr = &i2c_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), .flags = HWMOD_16BIT_REG, }; @@ -1536,6 +1098,7 @@ static struct omap_hwmod_addr_space omap2420_gpio1_addr_space[] = { .pa_end = 0x480181ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio1 = { @@ -1543,7 +1106,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio1 = { .slave = &omap2420_gpio1_hwmod, .clk = "gpios_ick", .addr = omap2420_gpio1_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_gpio1_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1554,6 +1116,7 @@ static struct omap_hwmod_addr_space omap2420_gpio2_addr_space[] = { .pa_end = 0x4801a1ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio2 = { @@ -1561,7 +1124,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio2 = { .slave = &omap2420_gpio2_hwmod, .clk = "gpios_ick", .addr = omap2420_gpio2_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_gpio2_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1572,6 +1134,7 @@ static struct omap_hwmod_addr_space omap2420_gpio3_addr_space[] = { .pa_end = 0x4801c1ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio3 = { @@ -1579,7 +1142,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio3 = { .slave = &omap2420_gpio3_hwmod, .clk = "gpios_ick", .addr = omap2420_gpio3_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_gpio3_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1590,6 +1152,7 @@ static struct omap_hwmod_addr_space omap2420_gpio4_addr_space[] = { .pa_end = 0x4801e1ff, .flags = ADDR_TYPE_RT }, + { } }; static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio4 = { @@ -1597,7 +1160,6 @@ static struct omap_hwmod_ocp_if omap2420_l4_wkup__gpio4 = { .slave = &omap2420_gpio4_hwmod, .clk = "gpios_ick", .addr = omap2420_gpio4_addr_space, - .addr_cnt = ARRAY_SIZE(omap2420_gpio4_addr_space), .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1607,32 +1169,7 @@ static struct omap_gpio_dev_attr gpio_dev_attr = { .dbck_flag = false, }; -static struct omap_hwmod_class_sysconfig omap242x_gpio_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_ENAWAKEUP | SYSC_HAS_SIDLEMODE | - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE | - SYSS_HAS_RESET_STATUS), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -/* - * 'gpio' class - * general purpose io module - */ -static struct omap_hwmod_class omap242x_gpio_hwmod_class = { - .name = "gpio", - .sysc = &omap242x_gpio_sysc, - .rev = 0, -}; - /* gpio1 */ -static struct omap_hwmod_irq_info omap242x_gpio1_irqs[] = { - { .irq = 29 }, /* INT_24XX_GPIO_BANK1 */ -}; - static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = { &omap2420_l4_wkup__gpio1, }; @@ -1640,8 +1177,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio1_slaves[] = { static struct omap_hwmod omap2420_gpio1_hwmod = { .name = "gpio1", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap242x_gpio1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio1_irqs), + .mpu_irqs = omap2_gpio1_irqs, .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1654,16 +1190,11 @@ static struct omap_hwmod omap2420_gpio1_hwmod = { }, .slaves = omap2420_gpio1_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_gpio1_slaves), - .class = &omap242x_gpio_hwmod_class, + .class = &omap2xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; /* gpio2 */ -static struct omap_hwmod_irq_info omap242x_gpio2_irqs[] = { - { .irq = 30 }, /* INT_24XX_GPIO_BANK2 */ -}; - static struct omap_hwmod_ocp_if *omap2420_gpio2_slaves[] = { &omap2420_l4_wkup__gpio2, }; @@ -1671,8 +1202,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio2_slaves[] = { static struct omap_hwmod omap2420_gpio2_hwmod = { .name = "gpio2", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap242x_gpio2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio2_irqs), + .mpu_irqs = omap2_gpio2_irqs, .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1685,16 +1215,11 @@ static struct omap_hwmod omap2420_gpio2_hwmod = { }, .slaves = omap2420_gpio2_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_gpio2_slaves), - .class = &omap242x_gpio_hwmod_class, + .class = &omap2xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; /* gpio3 */ -static struct omap_hwmod_irq_info omap242x_gpio3_irqs[] = { - { .irq = 31 }, /* INT_24XX_GPIO_BANK3 */ -}; - static struct omap_hwmod_ocp_if *omap2420_gpio3_slaves[] = { &omap2420_l4_wkup__gpio3, }; @@ -1702,8 +1227,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio3_slaves[] = { static struct omap_hwmod omap2420_gpio3_hwmod = { .name = "gpio3", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap242x_gpio3_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio3_irqs), + .mpu_irqs = omap2_gpio3_irqs, .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1716,16 +1240,11 @@ static struct omap_hwmod omap2420_gpio3_hwmod = { }, .slaves = omap2420_gpio3_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_gpio3_slaves), - .class = &omap242x_gpio_hwmod_class, + .class = &omap2xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; /* gpio4 */ -static struct omap_hwmod_irq_info omap242x_gpio4_irqs[] = { - { .irq = 32 }, /* INT_24XX_GPIO_BANK4 */ -}; - static struct omap_hwmod_ocp_if *omap2420_gpio4_slaves[] = { &omap2420_l4_wkup__gpio4, }; @@ -1733,8 +1252,7 @@ static struct omap_hwmod_ocp_if *omap2420_gpio4_slaves[] = { static struct omap_hwmod omap2420_gpio4_hwmod = { .name = "gpio4", .flags = HWMOD_CONTROL_OPT_CLKS_IN_RESET, - .mpu_irqs = omap242x_gpio4_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap242x_gpio4_irqs), + .mpu_irqs = omap2_gpio4_irqs, .main_clk = "gpios_fck", .prcm = { .omap2 = { @@ -1747,26 +1265,8 @@ static struct omap_hwmod omap2420_gpio4_hwmod = { }, .slaves = omap2420_gpio4_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_gpio4_slaves), - .class = &omap242x_gpio_hwmod_class, + .class = &omap2xxx_gpio_hwmod_class, .dev_attr = &gpio_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), -}; - -/* system dma */ -static struct omap_hwmod_class_sysconfig omap2420_dma_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x002c, - .syss_offs = 0x0028, - .sysc_flags = (SYSC_HAS_SOFTRESET | SYSC_HAS_MIDLEMODE | - SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_EMUFREE | - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), - .idlemodes = (MSTANDBY_FORCE | MSTANDBY_NO | MSTANDBY_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2420_dma_hwmod_class = { - .name = "dma", - .sysc = &omap2420_dma_sysc, }; /* dma attributes */ @@ -1776,21 +1276,6 @@ static struct omap_dma_dev_attr dma_dev_attr = { .lch_count = 32, }; -static struct omap_hwmod_irq_info omap2420_dma_system_irqs[] = { - { .name = "0", .irq = 12 }, /* INT_24XX_SDMA_IRQ0 */ - { .name = "1", .irq = 13 }, /* INT_24XX_SDMA_IRQ1 */ - { .name = "2", .irq = 14 }, /* INT_24XX_SDMA_IRQ2 */ - { .name = "3", .irq = 15 }, /* INT_24XX_SDMA_IRQ3 */ -}; - -static struct omap_hwmod_addr_space omap2420_dma_system_addrs[] = { - { - .pa_start = 0x48056000, - .pa_end = 0x48056fff, - .flags = ADDR_TYPE_RT - }, -}; - /* dma_system -> L3 */ static struct omap_hwmod_ocp_if omap2420_dma_system__l3 = { .master = &omap2420_dma_system_hwmod, @@ -1809,8 +1294,7 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__dma_system = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_dma_system_hwmod, .clk = "sdma_ick", - .addr = omap2420_dma_system_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_dma_system_addrs), + .addr = omap2_dma_system_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1821,61 +1305,30 @@ static struct omap_hwmod_ocp_if *omap2420_dma_system_slaves[] = { static struct omap_hwmod omap2420_dma_system_hwmod = { .name = "dma", - .class = &omap2420_dma_hwmod_class, - .mpu_irqs = omap2420_dma_system_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_dma_system_irqs), + .class = &omap2xxx_dma_hwmod_class, + .mpu_irqs = omap2_dma_system_irqs, .main_clk = "core_l3_ck", .slaves = omap2420_dma_system_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_dma_system_slaves), .masters = omap2420_dma_system_masters, .masters_cnt = ARRAY_SIZE(omap2420_dma_system_masters), .dev_attr = &dma_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), .flags = HWMOD_NO_IDLEST, }; -/* - * 'mailbox' class - * mailbox module allowing communication between the on-chip processors - * using a queued mailbox-interrupt mechanism. - */ - -static struct omap_hwmod_class_sysconfig omap2420_mailbox_sysc = { - .rev_offs = 0x000, - .sysc_offs = 0x010, - .syss_offs = 0x014, - .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | - SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2420_mailbox_hwmod_class = { - .name = "mailbox", - .sysc = &omap2420_mailbox_sysc, -}; - /* mailbox */ static struct omap_hwmod omap2420_mailbox_hwmod; static struct omap_hwmod_irq_info omap2420_mailbox_irqs[] = { { .name = "dsp", .irq = 26 }, { .name = "iva", .irq = 34 }, -}; - -static struct omap_hwmod_addr_space omap2420_mailbox_addrs[] = { - { - .pa_start = 0x48094000, - .pa_end = 0x480941ff, - .flags = ADDR_TYPE_RT, - }, + { .irq = -1 } }; /* l4_core -> mailbox */ static struct omap_hwmod_ocp_if omap2420_l4_core__mailbox = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_mailbox_hwmod, - .addr = omap2420_mailbox_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_mailbox_addrs), + .addr = omap2_mailbox_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -1886,9 +1339,8 @@ static struct omap_hwmod_ocp_if *omap2420_mailbox_slaves[] = { static struct omap_hwmod omap2420_mailbox_hwmod = { .name = "mailbox", - .class = &omap2420_mailbox_hwmod_class, + .class = &omap2xxx_mailbox_hwmod_class, .mpu_irqs = omap2420_mailbox_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mailbox_irqs), .main_clk = "mailboxes_ick", .prcm = { .omap2 = { @@ -1901,48 +1353,9 @@ static struct omap_hwmod omap2420_mailbox_hwmod = { }, .slaves = omap2420_mailbox_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_mailbox_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), -}; - -/* - * 'mcspi' class - * multichannel serial port interface (mcspi) / master/slave synchronous serial - * bus - */ - -static struct omap_hwmod_class_sysconfig omap2420_mcspi_sysc = { - .rev_offs = 0x0000, - .sysc_offs = 0x0010, - .syss_offs = 0x0014, - .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE | - SYSC_HAS_ENAWAKEUP | SYSC_HAS_SOFTRESET | - SYSC_HAS_AUTOIDLE | SYSS_HAS_RESET_STATUS), - .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART), - .sysc_fields = &omap_hwmod_sysc_type1, -}; - -static struct omap_hwmod_class omap2420_mcspi_class = { - .name = "mcspi", - .sysc = &omap2420_mcspi_sysc, - .rev = OMAP2_MCSPI_REV, }; /* mcspi1 */ -static struct omap_hwmod_irq_info omap2420_mcspi1_mpu_irqs[] = { - { .irq = 65 }, -}; - -static struct omap_hwmod_dma_info omap2420_mcspi1_sdma_reqs[] = { - { .name = "tx0", .dma_req = 35 }, /* DMA_SPI1_TX0 */ - { .name = "rx0", .dma_req = 36 }, /* DMA_SPI1_RX0 */ - { .name = "tx1", .dma_req = 37 }, /* DMA_SPI1_TX1 */ - { .name = "rx1", .dma_req = 38 }, /* DMA_SPI1_RX1 */ - { .name = "tx2", .dma_req = 39 }, /* DMA_SPI1_TX2 */ - { .name = "rx2", .dma_req = 40 }, /* DMA_SPI1_RX2 */ - { .name = "tx3", .dma_req = 41 }, /* DMA_SPI1_TX3 */ - { .name = "rx3", .dma_req = 42 }, /* DMA_SPI1_RX3 */ -}; - static struct omap_hwmod_ocp_if *omap2420_mcspi1_slaves[] = { &omap2420_l4_core__mcspi1, }; @@ -1953,10 +1366,8 @@ static struct omap2_mcspi_dev_attr omap_mcspi1_dev_attr = { static struct omap_hwmod omap2420_mcspi1_hwmod = { .name = "mcspi1_hwmod", - .mpu_irqs = omap2420_mcspi1_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcspi1_mpu_irqs), - .sdma_reqs = omap2420_mcspi1_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi1_sdma_reqs), + .mpu_irqs = omap2_mcspi1_mpu_irqs, + .sdma_reqs = omap2_mcspi1_sdma_reqs, .main_clk = "mcspi1_fck", .prcm = { .omap2 = { @@ -1969,23 +1380,11 @@ static struct omap_hwmod omap2420_mcspi1_hwmod = { }, .slaves = omap2420_mcspi1_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_mcspi1_slaves), - .class = &omap2420_mcspi_class, - .dev_attr = &omap_mcspi1_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), + .class = &omap2xxx_mcspi_class, + .dev_attr = &omap_mcspi1_dev_attr, }; /* mcspi2 */ -static struct omap_hwmod_irq_info omap2420_mcspi2_mpu_irqs[] = { - { .irq = 66 }, -}; - -static struct omap_hwmod_dma_info omap2420_mcspi2_sdma_reqs[] = { - { .name = "tx0", .dma_req = 43 }, /* DMA_SPI2_TX0 */ - { .name = "rx0", .dma_req = 44 }, /* DMA_SPI2_RX0 */ - { .name = "tx1", .dma_req = 45 }, /* DMA_SPI2_TX1 */ - { .name = "rx1", .dma_req = 46 }, /* DMA_SPI2_RX1 */ -}; - static struct omap_hwmod_ocp_if *omap2420_mcspi2_slaves[] = { &omap2420_l4_core__mcspi2, }; @@ -1996,10 +1395,8 @@ static struct omap2_mcspi_dev_attr omap_mcspi2_dev_attr = { static struct omap_hwmod omap2420_mcspi2_hwmod = { .name = "mcspi2_hwmod", - .mpu_irqs = omap2420_mcspi2_mpu_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcspi2_mpu_irqs), - .sdma_reqs = omap2420_mcspi2_sdma_reqs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcspi2_sdma_reqs), + .mpu_irqs = omap2_mcspi2_mpu_irqs, + .sdma_reqs = omap2_mcspi2_sdma_reqs, .main_clk = "mcspi2_fck", .prcm = { .omap2 = { @@ -2012,9 +1409,8 @@ static struct omap_hwmod omap2420_mcspi2_hwmod = { }, .slaves = omap2420_mcspi2_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_mcspi2_slaves), - .class = &omap2420_mcspi_class, - .dev_attr = &omap_mcspi2_dev_attr, - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), + .class = &omap2xxx_mcspi_class, + .dev_attr = &omap_mcspi2_dev_attr, }; /* @@ -2030,20 +1426,7 @@ static struct omap_hwmod_class omap2420_mcbsp_hwmod_class = { static struct omap_hwmod_irq_info omap2420_mcbsp1_irqs[] = { { .name = "tx", .irq = 59 }, { .name = "rx", .irq = 60 }, -}; - -static struct omap_hwmod_dma_info omap2420_mcbsp1_sdma_chs[] = { - { .name = "rx", .dma_req = 32 }, - { .name = "tx", .dma_req = 31 }, -}; - -static struct omap_hwmod_addr_space omap2420_mcbsp1_addrs[] = { - { - .name = "mpu", - .pa_start = 0x48074000, - .pa_end = 0x480740ff, - .flags = ADDR_TYPE_RT - }, + { .irq = -1 } }; /* l4_core -> mcbsp1 */ @@ -2051,8 +1434,7 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp1 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_mcbsp1_hwmod, .clk = "mcbsp1_ick", - .addr = omap2420_mcbsp1_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_mcbsp1_addrs), + .addr = omap2_mcbsp1_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2065,9 +1447,7 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = { .name = "mcbsp1", .class = &omap2420_mcbsp_hwmod_class, .mpu_irqs = omap2420_mcbsp1_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcbsp1_irqs), - .sdma_reqs = omap2420_mcbsp1_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp1_sdma_chs), + .sdma_reqs = omap2_mcbsp1_sdma_reqs, .main_clk = "mcbsp1_fck", .prcm = { .omap2 = { @@ -2080,27 +1460,13 @@ static struct omap_hwmod omap2420_mcbsp1_hwmod = { }, .slaves = omap2420_mcbsp1_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_mcbsp1_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; /* mcbsp2 */ static struct omap_hwmod_irq_info omap2420_mcbsp2_irqs[] = { { .name = "tx", .irq = 62 }, { .name = "rx", .irq = 63 }, -}; - -static struct omap_hwmod_dma_info omap2420_mcbsp2_sdma_chs[] = { - { .name = "rx", .dma_req = 34 }, - { .name = "tx", .dma_req = 33 }, -}; - -static struct omap_hwmod_addr_space omap2420_mcbsp2_addrs[] = { - { - .name = "mpu", - .pa_start = 0x48076000, - .pa_end = 0x480760ff, - .flags = ADDR_TYPE_RT - }, + { .irq = -1 } }; /* l4_core -> mcbsp2 */ @@ -2108,8 +1474,7 @@ static struct omap_hwmod_ocp_if omap2420_l4_core__mcbsp2 = { .master = &omap2420_l4_core_hwmod, .slave = &omap2420_mcbsp2_hwmod, .clk = "mcbsp2_ick", - .addr = omap2420_mcbsp2_addrs, - .addr_cnt = ARRAY_SIZE(omap2420_mcbsp2_addrs), + .addr = omap2xxx_mcbsp2_addrs, .user = OCP_USER_MPU | OCP_USER_SDMA, }; @@ -2122,9 +1487,7 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = { .name = "mcbsp2", .class = &omap2420_mcbsp_hwmod_class, .mpu_irqs = omap2420_mcbsp2_irqs, - .mpu_irqs_cnt = ARRAY_SIZE(omap2420_mcbsp2_irqs), - .sdma_reqs = omap2420_mcbsp2_sdma_chs, - .sdma_reqs_cnt = ARRAY_SIZE(omap2420_mcbsp2_sdma_chs), + .sdma_reqs = omap2_mcbsp2_sdma_reqs, .main_clk = "mcbsp2_fck", .prcm = { .omap2 = { @@ -2137,7 +1500,6 @@ static struct omap_hwmod omap2420_mcbsp2_hwmod = { }, .slaves = omap2420_mcbsp2_slaves, .slaves_cnt = ARRAY_SIZE(omap2420_mcbsp2_slaves), - .omap_chip = OMAP_CHIP_INIT(CHIP_IS_OMAP2420), }; static __initdata struct omap_hwmod *omap2420_hwmods[] = { |