summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
Diffstat
-rw-r--r--arch/arm/mach-davinci/clock.c14
-rw-r--r--arch/arm/mach-davinci/da830.c5
-rw-r--r--arch/arm/mach-davinci/da850.c5
-rw-r--r--arch/arm/mach-davinci/dm355.c4
-rw-r--r--arch/arm/mach-davinci/dm365.c4
-rw-r--r--arch/arm/mach-davinci/dm644x.c4
-rw-r--r--arch/arm/mach-davinci/dm646x.c4
-rw-r--r--arch/arm/mach-davinci/include/mach/common.h2
-rw-r--r--arch/arm/mach-davinci/psc.c7
9 files changed, 23 insertions, 26 deletions
diff --git a/arch/arm/mach-davinci/clock.c b/arch/arm/mach-davinci/clock.c
index 868cb7693499..054c303caead 100644
--- a/arch/arm/mach-davinci/clock.c
+++ b/arch/arm/mach-davinci/clock.c
@@ -302,7 +302,6 @@ static unsigned long clk_pllclk_recalc(struct clk *clk)
struct pll_data *pll = clk->pll_data;
unsigned long rate = clk->rate;
- pll->base = IO_ADDRESS(pll->phys_base);
ctrl = __raw_readl(pll->base + PLLCTL);
rate = pll->input_rate = clk->parent->rate;
@@ -458,8 +457,17 @@ int __init davinci_clk_init(struct clk_lookup *clocks)
clk->recalc = clk_leafclk_recalc;
}
- if (clk->pll_data && !clk->pll_data->div_ratio_mask)
- clk->pll_data->div_ratio_mask = PLLDIV_RATIO_MASK;
+ if (clk->pll_data) {
+ struct pll_data *pll = clk->pll_data;
+
+ if (!pll->div_ratio_mask)
+ pll->div_ratio_mask = PLLDIV_RATIO_MASK;
+
+ if (pll->phys_base && !pll->base) {
+ pll->base = ioremap(pll->phys_base, SZ_4K);
+ WARN_ON(!pll->base);
+ }
+ }
if (clk->recalc)
clk->rate = clk->recalc(clk);
diff --git a/arch/arm/mach-davinci/da830.c b/arch/arm/mach-davinci/da830.c
index 8a2510c5236f..47a7f490cf6a 100644
--- a/arch/arm/mach-davinci/da830.c
+++ b/arch/arm/mach-davinci/da830.c
@@ -1127,10 +1127,7 @@ static struct map_desc da830_io_desc[] = {
},
};
-static void __iomem *da830_psc_bases[] = {
- IO_ADDRESS(DA8XX_PSC0_BASE),
- IO_ADDRESS(DA8XX_PSC1_BASE),
-};
+static u32 da830_psc_bases[] = { DA8XX_PSC0_BASE, DA8XX_PSC1_BASE };
/* Contents of JTAG ID register used to identify exact cpu type */
static struct davinci_id da830_ids[] = {
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index ebfa5ca29a81..2a430bbbd393 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -782,10 +782,7 @@ static struct map_desc da850_io_desc[] = {
},
};
-static void __iomem *da850_psc_bases[] = {
- IO_ADDRESS(DA8XX_PSC0_BASE),
- IO_ADDRESS(DA8XX_PSC1_BASE),
-};
+static u32 da850_psc_bases[] = { DA8XX_PSC0_BASE, DA8XX_PSC1_BASE };
/* Contents of JTAG ID register used to identify exact cpu type */
static struct davinci_id da850_ids[] = {
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 228b6d1460e5..70a18275c5da 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -783,9 +783,7 @@ static struct davinci_id dm355_ids[] = {
},
};
-static void __iomem *dm355_psc_bases[] = {
- IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE),
-};
+static u32 dm355_psc_bases[] = { DAVINCI_PWR_SLEEP_CNTRL_BASE };
/*
* T0_BOT: Timer 0, bottom: clockevent source for hrtimers
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index b396d58f130a..451a4efb7ddf 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -1002,9 +1002,7 @@ static struct davinci_id dm365_ids[] = {
},
};
-static void __iomem *dm365_psc_bases[] = {
- IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE),
-};
+static u32 dm365_psc_bases[] = { DAVINCI_PWR_SLEEP_CNTRL_BASE };
static struct davinci_timer_info dm365_timer_info = {
.timers = davinci_timer_instance,
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 9859567788c9..ee654de38f34 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -674,9 +674,7 @@ static struct davinci_id dm644x_ids[] = {
},
};
-static void __iomem *dm644x_psc_bases[] = {
- IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE),
-};
+static u32 dm644x_psc_bases[] = { DAVINCI_PWR_SLEEP_CNTRL_BASE };
/*
* T0_BOT: Timer 0, bottom: clockevent source for hrtimers
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index f9a8cc46eafd..4c98ef003c47 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -758,9 +758,7 @@ static struct davinci_id dm646x_ids[] = {
},
};
-static void __iomem *dm646x_psc_bases[] = {
- IO_ADDRESS(DAVINCI_PWR_SLEEP_CNTRL_BASE),
-};
+static u32 dm646x_psc_bases[] = { DAVINCI_PWR_SLEEP_CNTRL_BASE };
/*
* T0_BOT: Timer 0, bottom: clockevent source for hrtimers
diff --git a/arch/arm/mach-davinci/include/mach/common.h b/arch/arm/mach-davinci/include/mach/common.h
index 2e1546401397..4c8dfcb4d930 100644
--- a/arch/arm/mach-davinci/include/mach/common.h
+++ b/arch/arm/mach-davinci/include/mach/common.h
@@ -49,7 +49,7 @@ struct davinci_soc_info {
struct davinci_id *ids;
unsigned long ids_num;
struct clk_lookup *cpu_clks;
- void __iomem **psc_bases;
+ u32 *psc_bases;
unsigned long psc_bases_num;
void __iomem *pinmux_base;
const struct mux_config *pinmux_pins;
diff --git a/arch/arm/mach-davinci/psc.c b/arch/arm/mach-davinci/psc.c
index d7cb438c4df6..1b15dbd0a77b 100644
--- a/arch/arm/mach-davinci/psc.c
+++ b/arch/arm/mach-davinci/psc.c
@@ -38,8 +38,9 @@ int __init davinci_psc_is_clk_active(unsigned int ctlr, unsigned int id)
return 0;
}
- psc_base = soc_info->psc_bases[ctlr];
+ psc_base = ioremap(soc_info->psc_bases[ctlr], SZ_4K);
mdstat = __raw_readl(psc_base + MDSTAT + 4 * id);
+ iounmap(psc_base);
/* if clocked, state can be "Enable" or "SyncReset" */
return mdstat & BIT(12);
@@ -59,7 +60,7 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr,
return;
}
- psc_base = soc_info->psc_bases[ctlr];
+ psc_base = ioremap(soc_info->psc_bases[ctlr], SZ_4K);
mdctl = __raw_readl(psc_base + MDCTL + 4 * id);
mdctl &= ~MDSTAT_STATE_MASK;
@@ -99,4 +100,6 @@ void davinci_psc_config(unsigned int domain, unsigned int ctlr,
do {
mdstat = __raw_readl(psc_base + MDSTAT + 4 * id);
} while (!((mdstat & MDSTAT_STATE_MASK) == next_state));
+
+ iounmap(psc_base);
}
OpenPOWER on IntegriCloud