diff options
| -rw-r--r-- | Documentation/arm/Atmel/README | 124 | ||||
| -rw-r--r-- | MAINTAINERS | 1 | ||||
| -rw-r--r-- | arch/arm/Kconfig.debug | 9 | ||||
| -rw-r--r-- | arch/arm/include/debug/at91.S (renamed from arch/arm/mach-at91/include/mach/debug-macro.S) | 19 | ||||
| -rw-r--r-- | arch/arm/mach-at91/Kconfig | 8 | ||||
| -rw-r--r-- | arch/arm/mach-at91/Makefile | 6 | ||||
| -rw-r--r-- | arch/arm/mach-at91/at91sam9260.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-at91/at91sam9261.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-at91/at91sam9263.c | 3 | ||||
| -rw-r--r-- | arch/arm/mach-at91/at91sam9g45.c | 4 | ||||
| -rw-r--r-- | arch/arm/mach-at91/at91sam9n12.c | 6 | ||||
| -rw-r--r-- | arch/arm/mach-at91/at91sam9rl.c | 4 | ||||
| -rw-r--r-- | arch/arm/mach-at91/at91sam9x5.c | 10 | ||||
| -rw-r--r-- | arch/arm/mach-at91/board-dt-rm9200.c | 2 | ||||
| -rw-r--r-- | arch/arm/mach-at91/generic.h | 6 | ||||
| -rw-r--r-- | arch/arm/mach-at91/include/mach/at91_pio.h | 80 | ||||
| -rw-r--r-- | arch/arm/mach-at91/include/mach/at91_rtt.h | 35 | ||||
| -rw-r--r-- | arch/arm/mach-at91/include/mach/memory.h | 26 | ||||
| -rw-r--r-- | arch/arm/mach-at91/sama5d3.c | 6 | ||||
| -rw-r--r-- | arch/arm/mach-at91/setup.c | 18 | ||||
| -rw-r--r-- | arch/arm/mach-at91/sysirq_mask.c | 75 | ||||
| -rw-r--r-- | drivers/rtc/Kconfig | 28 |
22 files changed, 147 insertions, 327 deletions
diff --git a/Documentation/arm/Atmel/README b/Documentation/arm/Atmel/README new file mode 100644 index 000000000000..c53a19b4aab2 --- /dev/null +++ b/Documentation/arm/Atmel/README @@ -0,0 +1,124 @@ +ARM Atmel SoCs (aka AT91) +========================= + + +Introduction +------------ +This document gives useful information about the ARM Atmel SoCs that are +currently supported in Linux Mainline (you know, the one on kernel.org). + +It is important to note that the Atmel | SMART ARM-based MPU product line is +historically named "AT91" or "at91" throughout the Linux kernel development +process even if this product prefix has completely disappeared from the +official Atmel product name. Anyway, files, directories, git trees, +git branches/tags and email subject always contain this "at91" sub-string. + + +AT91 SoCs +--------- +Documentation and detailled datasheet for each product are available on +the Atmel website: http://www.atmel.com. + + Flavors: + * ARM 920 based SoC + - at91rm9200 + + Datasheet + http://www.atmel.com/Images/doc1768.pdf + + * ARM 926 based SoCs + - at91sam9260 + + Datasheet + http://www.atmel.com/Images/doc6221.pdf + + - at91sam9xe + + Datasheet + http://www.atmel.com/Images/Atmel-6254-32-bit-ARM926EJ-S-Embedded-Microprocessor-SAM9XE_Datasheet.pdf + + - at91sam9261 + + Datasheet + http://www.atmel.com/Images/doc6062.pdf + + - at91sam9263 + + Datasheet + http://www.atmel.com/Images/Atmel_6249_32-bit-ARM926EJ-S-Microcontroller_SAM9263_Datasheet.pdf + + - at91sam9rl + + Datasheet + http://www.atmel.com/Images/doc6289.pdf + + - at91sam9g20 + + Datasheet + http://www.atmel.com/Images/doc6384.pdf + + - at91sam9g45 family + - at91sam9g45 + - at91sam9g46 + - at91sam9m10 + - at91sam9m11 (device superset) + + Datasheet + http://www.atmel.com/Images/Atmel-6437-32-bit-ARM926-Embedded-Microprocessor-SAM9M11_Datasheet.pdf + + - at91sam9x5 family (aka "The 5 series") + - at91sam9g15 + - at91sam9g25 + - at91sam9g35 + - at91sam9x25 + - at91sam9x35 + + Datasheet (can be considered as covering the whole family) + http://www.atmel.com/Images/Atmel_11055_32-bit-ARM926EJ-S-Microcontroller_SAM9X35_Datasheet.pdf + + - at91sam9n12 + + Datasheet + http://www.atmel.com/Images/Atmel_11063_32-bit-ARM926EJ-S-Microcontroller_SAM9N12CN11CN12_Datasheet.pdf + + * ARM Cortex-A5 based SoCs + - sama5d3 family + - sama5d31 + - sama5d33 + - sama5d34 + - sama5d35 + - sama5d36 (device superset) + + Datasheet + http://www.atmel.com/Images/Atmel-11121-32-bit-Cortex-A5-Microcontroller-SAMA5D3_Datasheet.pdf + + * ARM Cortex-A5 + NEON based SoCs + - sama5d4 family + - sama5d41 + - sama5d42 + - sama5d43 + - sama5d44 (device superset) + + Datasheet + http://www.atmel.com/Images/Atmel-11238-32-bit-Cortex-A5-Microcontroller-SAMA5D4_Datasheet.pdf + + +Linux kernel information +------------------------ +Linux kernel mach directory: arch/arm/mach-at91 +MAINTAINERS entry is: "ARM/ATMEL AT91RM9200 AND AT91SAM ARM ARCHITECTURES" + + +Device Tree for AT91 SoCs and boards +------------------------------------ +All AT91 SoCs are converted to Device Tree. Since Linux 3.19, these products +must use this method to boot the Linux kernel. + +Work In Progress statement: +Device Tree files and Device Tree bindings that apply to AT91 SoCs and boards are +considered as "Unstable". To be completely clear, any at91 binding can change at +any time. So, be sure to use a Device Tree Binary and a Kernel Image generated from +the same source tree. +Please refer to the Documentation/devicetree/bindings/ABI.txt file for a +definition of a "Stable" binding/ABI. +This statement will be removed by AT91 MAINTAINERS when appropriate. + +Naming conventions and best practice: +- SoCs Device Tree Source Include files are named after the official name of + the product (at91sam9g20.dtsi or sama5d33.dtsi for instance). +- Device Tree Source Include files (.dtsi) are used to collect common nodes that can be + shared across SoCs or boards (sama5d3.dtsi or at91sam9x5cm.dtsi for instance). + When collecting nodes for a particular peripheral or topic, the identifier have to + be placed at the end of the file name, separated with a "_" (at91sam9x5_can.dtsi + or sama5d3_gmac.dtsi for example). +- board Device Tree Source files (.dts) are prefixed by the string "at91-" so + that they can be identified easily. Note that some files are historical exceptions + to this rule (sama5d3[13456]ek.dts, usb_a9g20.dts or animeo_ip.dts for example). diff --git a/MAINTAINERS b/MAINTAINERS index b65b22b0ea3e..2381bc195f94 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -877,6 +877,7 @@ F: arch/arm/boot/dts/at91*.dts F: arch/arm/boot/dts/at91*.dtsi F: arch/arm/boot/dts/sama*.dts F: arch/arm/boot/dts/sama*.dtsi +F: arch/arm/include/debug/at91.S ARM/ATMEL AT91 Clock Support M: Boris Brezillon <boris.brezillon@free-electrons.com> diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 5ddd4906f7a7..e34d24949c6a 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -115,15 +115,18 @@ choice 0x80024000 | 0xf0024000 | UART9 config AT91_DEBUG_LL_DBGU0 - bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10 and 9rl" + bool "Kernel low-level debugging on rm9200, 9260/9g20, 9261/9g10, 9rl, 9x5, 9n12" + select DEBUG_AT91_UART depends on HAVE_AT91_DBGU0 config AT91_DEBUG_LL_DBGU1 - bool "Kernel low-level debugging on 9263 and 9g45" + bool "Kernel low-level debugging on 9263, 9g45 and sama5d3" + select DEBUG_AT91_UART depends on HAVE_AT91_DBGU1 config AT91_DEBUG_LL_DBGU2 bool "Kernel low-level debugging on sama5d4" + select DEBUG_AT91_UART depends on HAVE_AT91_DBGU2 config DEBUG_BCM2835 @@ -1165,6 +1168,8 @@ config DEBUG_LL_INCLUDE string default "debug/sa1100.S" if DEBUG_SA1100 default "debug/8250.S" if DEBUG_LL_UART_8250 || DEBUG_UART_8250 + default "debug/at91.S" if AT91_DEBUG_LL_DBGU0 || AT91_DEBUG_LL_DBGU1 || \ + AT91_DEBUG_LL_DBGU2 default "debug/asm9260.S" if DEBUG_ASM9260_UART default "debug/clps711x.S" if DEBUG_CLPS711X_UART1 || DEBUG_CLPS711X_UART2 default "debug/meson.S" if DEBUG_MESON_UARTAO diff --git a/arch/arm/mach-at91/include/mach/debug-macro.S b/arch/arm/include/debug/at91.S index 2103a90f2261..80a6501b4d50 100644 --- a/arch/arm/mach-at91/include/mach/debug-macro.S +++ b/arch/arm/include/debug/at91.S @@ -1,6 +1,4 @@ /* - * arch/arm/mach-at91/include/mach/debug-macro.S - * * Copyright (C) 2003-2005 SAN People * * Debugging macro include header @@ -11,18 +9,23 @@ * */ -#include <mach/hardware.h> -#include <mach/at91_dbgu.h> - #if defined(CONFIG_AT91_DEBUG_LL_DBGU0) -#define AT91_DBGU AT91_BASE_DBGU0 +#define AT91_DBGU 0xfffff200 /* AT91_BASE_DBGU0 */ #elif defined(CONFIG_AT91_DEBUG_LL_DBGU1) -#define AT91_DBGU AT91_BASE_DBGU1 +#define AT91_DBGU 0xffffee00 /* AT91_BASE_DBGU1 */ #else /* On sama5d4, use USART3 as low level serial console */ -#define AT91_DBGU SAMA5D4_BASE_USART3 +#define AT91_DBGU 0xfc00c000 /* SAMA5D4_BASE_USART3 */ #endif +/* Keep in sync with mach-at91/include/mach/hardware.h */ +#define AT91_IO_P2V(x) ((x) - 0x01000000) + +#define AT91_DBGU_SR (0x14) /* Status Register */ +#define AT91_DBGU_THR (0x1c) /* Transmitter Holding Register */ +#define AT91_DBGU_TXRDY (1 << 1) /* Transmitter Ready */ +#define AT91_DBGU_TXEMPTY (1 << 9) /* Transmitter Empty */ + .macro addruart, rp, rv, tmp ldr \rp, =AT91_DBGU @ System peripherals (phys address) ldr \rv, =AT91_IO_P2V(AT91_DBGU) @ System peripherals (virt address) diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index 2395c68b3e32..cec0fb5d621a 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -174,14 +174,6 @@ config SOC_AT91SAM9N12 # ---------------------------------------------------------- endif # SOC_SAM_V4_V5 -config MACH_AT91RM9200_DT - def_bool SOC_AT91RM9200 - -config MACH_AT91SAM9_DT - def_bool SOC_AT91SAM9 - -# ---------------------------------------------------------- - comment "AT91 Feature Selections" config AT91_SLOW_CLOCK diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index 7b6424d40764..8ef7d9a2e855 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -2,7 +2,7 @@ # Makefile for the linux kernel. # -obj-y := setup.o sysirq_mask.o +obj-y := setup.o obj-$(CONFIG_SOC_AT91SAM9) += sam9_smc.o @@ -19,8 +19,8 @@ obj-$(CONFIG_SOC_SAMA5D3) += sama5d3.o obj-$(CONFIG_SOC_SAMA5D4) += sama5d4.o # AT91SAM board with device-tree -obj-$(CONFIG_MACH_AT91RM9200_DT) += board-dt-rm9200.o -obj-$(CONFIG_MACH_AT91SAM9_DT) += board-dt-sam9.o +obj-$(CONFIG_SOC_AT91RM9200) += board-dt-rm9200.o +obj-$(CONFIG_SOC_AT91SAM9) += board-dt-sam9.o # SAMA5 board with device-tree obj-$(CONFIG_SOC_SAMA5) += board-dt-sama5.o diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index 78137c24d90b..34e2abe82ae4 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c @@ -51,8 +51,6 @@ static void __init at91sam9260_map_io(void) static void __init at91sam9260_initialize(void) { arm_pm_idle = at91sam9_idle; - - at91_sysirq_mask_rtt(AT91SAM9260_BASE_RTT); } AT91_SOC_START(at91sam9260) diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c index d29953ecb0c4..47878b849975 100644 --- a/arch/arm/mach-at91/at91sam9261.c +++ b/arch/arm/mach-at91/at91sam9261.c @@ -32,8 +32,6 @@ static void __init at91sam9261_map_io(void) static void __init at91sam9261_initialize(void) { arm_pm_idle = at91sam9_idle; - - at91_sysirq_mask_rtt(AT91SAM9261_BASE_RTT); } AT91_SOC_START(at91sam9261) diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c index e7ad14864083..aabcb66145d0 100644 --- a/arch/arm/mach-at91/at91sam9263.c +++ b/arch/arm/mach-at91/at91sam9263.c @@ -29,9 +29,6 @@ static void __init at91sam9263_map_io(void) static void __init at91sam9263_initialize(void) { arm_pm_idle = at91sam9_idle; - - at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT0); - at91_sysirq_mask_rtt(AT91SAM9263_BASE_RTT1); } AT91_SOC_START(at91sam9263) diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c index b6117bea9a6f..000166777a8d 100644 --- a/arch/arm/mach-at91/at91sam9g45.c +++ b/arch/arm/mach-at91/at91sam9g45.c @@ -11,7 +11,6 @@ */ #include <asm/system_misc.h> -#include <asm/irq.h> #include <mach/hardware.h> #include "soc.h" @@ -29,9 +28,6 @@ static void __init at91sam9g45_map_io(void) static void __init at91sam9g45_initialize(void) { arm_pm_idle = at91sam9_idle; - - at91_sysirq_mask_rtc(AT91SAM9G45_BASE_RTC); - at91_sysirq_mask_rtt(AT91SAM9G45_BASE_RTT); } AT91_SOC_START(at91sam9g45) diff --git a/arch/arm/mach-at91/at91sam9n12.c b/arch/arm/mach-at91/at91sam9n12.c index dee569b1987e..0135f868ea4f 100644 --- a/arch/arm/mach-at91/at91sam9n12.c +++ b/arch/arm/mach-at91/at91sam9n12.c @@ -21,12 +21,6 @@ static void __init at91sam9n12_map_io(void) at91_init_sram(0, AT91SAM9N12_SRAM_BASE, AT91SAM9N12_SRAM_SIZE); } -static void __init at91sam9n12_initialize(void) -{ - at91_sysirq_mask_rtc(AT91SAM9N12_BASE_RTC); -} - AT91_SOC_START(at91sam9n12) .map_io = at91sam9n12_map_io, - .init = at91sam9n12_initialize, AT91_SOC_END diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c index f25b9aec9c50..1babfb27694a 100644 --- a/arch/arm/mach-at91/at91sam9rl.c +++ b/arch/arm/mach-at91/at91sam9rl.c @@ -10,7 +10,6 @@ */ #include <asm/system_misc.h> -#include <asm/irq.h> #include <mach/cpu.h> #include <mach/at91_dbgu.h> #include <mach/hardware.h> @@ -42,9 +41,6 @@ static void __init at91sam9rl_map_io(void) static void __init at91sam9rl_initialize(void) { arm_pm_idle = at91sam9_idle; - - at91_sysirq_mask_rtc(AT91SAM9RL_BASE_RTC); - at91_sysirq_mask_rtt(AT91SAM9RL_BASE_RTT); } AT91_SOC_START(at91sam9rl) diff --git a/arch/arm/mach-at91/at91sam9x5.c b/arch/arm/mach-at91/at91sam9x5.c index f0d5a69a7237..aa17520ccb0a 100644 --- a/arch/arm/mach-at91/at91sam9x5.c +++ b/arch/arm/mach-at91/at91sam9x5.c @@ -21,16 +21,6 @@ static void __init at91sam9x5_map_io(void) at91_init_sram(0, AT91SAM9X5_SRAM_BASE, AT91SAM9X5_SRAM_SIZE); } -static void __init at91sam9x5_initialize(void) -{ - at91_sysirq_mask_rtc(AT91SAM9X5_BASE_RTC); -} - -/* -------------------------------------------------------------------- - * Interrupt initialization - * -------------------------------------------------------------------- */ - AT91_SOC_START(at91sam9x5) .map_io = at91sam9x5_map_io, - .init = at91sam9x5_initialize, AT91_SOC_END diff --git a/arch/arm/mach-at91/board-dt-rm9200.c b/arch/arm/mach-at91/board-dt-rm9200.c index 76dfe8f9af50..a15ab6f8de00 100644 --- a/arch/arm/mach-at91/board-dt-rm9200.c +++ b/arch/arm/mach-at91/board-dt-rm9200.c @@ -38,6 +38,6 @@ static const char *at91rm9200_dt_board_compat[] __initdata = { DT_MACHINE_START(at91rm9200_dt, "Atmel AT91RM9200 (Device Tree)") .init_time = at91rm9200_dt_timer_init, .map_io = at91_map_io, - .init_early = at91rm9200_dt_initialize, + .init_early = at91_dt_initialize, .dt_compat = at91rm9200_dt_board_compat, MACHINE_END diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h index d53324210adf..54f3837a0a4d 100644 --- a/arch/arm/mach-at91/generic.h +++ b/arch/arm/mach-at91/generic.h @@ -21,14 +21,8 @@ extern void __init at91_init_sram(int bank, unsigned long base, unsigned int length); /* Processors */ -extern void __init at91rm9200_set_type(int type); -extern void __init at91rm9200_dt_initialize(void); extern void __init at91_dt_initialize(void); - /* Interrupts */ -extern void __init at91_sysirq_mask_rtc(u32 rtc_base); -extern void __init at91_sysirq_mask_rtt(u32 rtt_base); - /* Timer */ extern void at91rm9200_timer_init(void); diff --git a/arch/arm/mach-at91/include/mach/at91_pio.h b/arch/arm/mach-at91/include/mach/at91_pio.h deleted file mode 100644 index 7b7366253ceb..000000000000 --- a/arch/arm/mach-at91/include/mach/at91_pio.h +++ /dev/null @@ -1,80 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/at91_pio.h - * - * Copyright (C) 2005 Ivan Kokshaysky - * Copyright (C) SAN People - * - * Parallel I/O Controller (PIO) - System peripherals registers. - * Based on AT91RM9200 datasheet revision E. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_PIO_H -#define AT91_PIO_H - -#define PIO_PER 0x00 /* Enable Register */ -#define PIO_PDR 0x04 /* Disable Register */ -#define PIO_PSR 0x08 /* Status Register */ -#define PIO_OER 0x10 /* Output Enable Register */ -#define PIO_ODR 0x14 /* Output Disable Register */ -#define PIO_OSR 0x18 /* Output Status Register */ -#define PIO_IFER 0x20 /* Glitch Input Filter Enable */ -#define PIO_IFDR 0x24 /* Glitch Input Filter Disable */ -#define PIO_IFSR 0x28 /* Glitch Input Filter Status */ -#define PIO_SODR 0x30 /* Set Output Data Register */ -#define PIO_CODR 0x34 /* Clear Output Data Register */ -#define PIO_ODSR 0x38 /* Output Data Status Register */ -#define PIO_PDSR 0x3c /* Pin Data Status Register */ -#define PIO_IER 0x40 /* Interrupt Enable Register */ -#define PIO_IDR 0x44 /* Interrupt Disable Register */ -#define PIO_IMR 0x48 /* Interrupt Mask Register */ -#define PIO_ISR 0x4c /* Interrupt Status Register */ -#define PIO_MDER 0x50 /* Multi-driver Enable Register */ -#define PIO_MDDR 0x54 /* Multi-driver Disable Register */ -#define PIO_MDSR 0x58 /* Multi-driver Status Register */ -#define PIO_PUDR 0x60 /* Pull-up Disable Register */ -#define PIO_PUER 0x64 /* Pull-up Enable Register */ -#define PIO_PUSR 0x68 /* Pull-up Status Register */ -#define PIO_ASR 0x70 /* Peripheral A Select Register */ -#define PIO_ABCDSR1 0x70 /* Peripheral ABCD Select Register 1 [some sam9 only] */ -#define PIO_BSR 0x74 /* Peripheral B Select Register */ -#define PIO_ABCDSR2 0x74 /* Peripheral ABCD Select Register 2 [some sam9 only] */ -#define PIO_ABSR 0x78 /* AB Status Register */ -#define PIO_IFSCDR 0x80 /* Input Filter Slow Clock Disable Register */ -#define PIO_IFSCER 0x84 /* Input Filter Slow Clock Enable Register */ -#define PIO_IFSCSR 0x88 /* Input Filter Slow Clock Status Register */ -#define PIO_SCDR 0x8c /* Slow Clock Divider Debouncing Register */ -#define PIO_SCDR_DIV (0x3fff << 0) /* Slow Clock Divider Mask */ -#define PIO_PPDDR 0x90 /* Pad Pull-down Disable Register */ -#define PIO_PPDER 0x94 /* Pad Pull-down Enable Register */ -#define PIO_PPDSR 0x98 /* Pad Pull-down Status Register */ -#define PIO_OWER 0xa0 /* Output Write Enable Register */ -#define PIO_OWDR 0xa4 /* Output Write Disable Register */ -#define PIO_OWSR 0xa8 /* Output Write Status Register */ -#define PIO_AIMER 0xb0 /* Additional Interrupt Modes Enable Register */ -#define PIO_AIMDR 0xb4 /* Additional Interrupt Modes Disable Register */ -#define PIO_AIMMR 0xb8 /* Additional Interrupt Modes Mask Register */ -#define PIO_ESR 0xc0 /* Edge Select Register */ -#define PIO_LSR 0xc4 /* Level Select Register */ -#define PIO_ELSR 0xc8 /* Edge/Level Status Register */ -#define PIO_FELLSR 0xd0 /* Falling Edge/Low Level Select Register */ -#define PIO_REHLSR 0xd4 /* Rising Edge/ High Level Select Register */ -#define PIO_FRLHSR 0xd8 /* Fall/Rise - Low/High Status Register */ -#define PIO_SCHMITT 0x100 /* Schmitt Trigger Register */ - -#define ABCDSR_PERIPH_A 0x0 -#define ABCDSR_PERIPH_B 0x1 -#define ABCDSR_PERIPH_C 0x2 -#define ABCDSR_PERIPH_D 0x3 - -#define SAMA5D3_PIO_DRIVER1 0x118 /*PIO Driver 1 register offset*/ -#define SAMA5D3_PIO_DRIVER2 0x11C /*PIO Driver 2 register offset*/ - -#define AT91SAM9X5_PIO_DRIVER1 0x114 /*PIO Driver 1 register offset*/ -#define AT91SAM9X5_PIO_DRIVER2 0x118 /*PIO Driver 2 register offset*/ - -#endif diff --git a/arch/arm/mach-at91/include/mach/at91_rtt.h b/arch/arm/mach-at91/include/mach/at91_rtt.h deleted file mode 100644 index 7ec75de8bbb6..000000000000 --- a/arch/arm/mach-at91/include/mach/at91_rtt.h +++ /dev/null @@ -1,35 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/at91_rtt.h - * - * Copyright (C) 2007 Andrew Victor - * Copyright (C) 2007 Atmel Corporation. - * - * Real-time Timer (RTT) - System peripherals regsters. - * Based on AT91SAM9261 datasheet revision D. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#ifndef AT91_RTT_H -#define AT91_RTT_H - -#define AT91_RTT_MR 0x00 /* Real-time Mode Register */ -#define AT91_RTT_RTPRES (0xffff << 0) /* Real-time Timer Prescaler Value */ -#define AT91_RTT_ALMIEN (1 << 16) /* Alarm Interrupt Enable */ -#define AT91_RTT_RTTINCIEN (1 << 17) /* Real Time Timer Increment Interrupt Enable */ -#define AT91_RTT_RTTRST (1 << 18) /* Real Time Timer Restart */ - -#define AT91_RTT_AR 0x04 /* Real-time Alarm Register */ -#define AT91_RTT_ALMV (0xffffffff) /* Alarm Value */ - -#define AT91_RTT_VR 0x08 /* Real-time Value Register */ -#define AT91_RTT_CRTV (0xffffffff) /* Current Real-time Value */ - -#define AT91_RTT_SR 0x0c /* Real-time Status Register */ -#define AT91_RTT_ALMS (1 << 0) /* Real-time Alarm Status */ -#define AT91_RTT_RTTINC (1 << 1) /* Real-time Timer Increment */ - -#endif diff --git a/arch/arm/mach-at91/include/mach/memory.h b/arch/arm/mach-at91/include/mach/memory.h deleted file mode 100644 index 401c207f2f39..000000000000 --- a/arch/arm/mach-at91/include/mach/memory.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * arch/arm/mach-at91/include/mach/memory.h - * - * Copyright (C) 2004 SAN People - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __ASM_ARCH_MEMORY_H -#define __ASM_ARCH_MEMORY_H - -#include <mach/hardware.h> - -#endif diff --git a/arch/arm/mach-at91/sama5d3.c b/arch/arm/mach-at91/sama5d3.c index 3d775d08de08..ae58feada72b 100644 --- a/arch/arm/mach-at91/sama5d3.c +++ b/arch/arm/mach-at91/sama5d3.c @@ -30,12 +30,6 @@ static void __init sama5d3_map_io(void) at91_init_sram(0, SAMA5D3_SRAM_BASE, SAMA5D3_SRAM_SIZE); } -static void __init sama5d3_initialize(void) -{ - at91_sysirq_mask_rtc(SAMA5D3_BASE_RTC); -} - AT91_SOC_START(sama5d3) .map_io = sama5d3_map_io, - .init = sama5d3_initialize, AT91_SOC_END diff --git a/arch/arm/mach-at91/setup.c b/arch/arm/mach-at91/setup.c index ce25e85720fb..e3c21b458bb8 100644 --- a/arch/arm/mach-at91/setup.c +++ b/arch/arm/mach-at91/setup.c @@ -31,17 +31,6 @@ struct at91_init_soc __initdata at91_boot_soc; struct at91_socinfo at91_soc_initdata; EXPORT_SYMBOL(at91_soc_initdata); -void __init at91rm9200_set_type(int type) -{ - if (type == ARCH_REVISON_9200_PQFP) - at91_soc_initdata.subtype = AT91_SOC_RM9200_PQFP; - else - at91_soc_initdata.subtype = AT91_SOC_RM9200_BGA; - - pr_info("filled in soc subtype: %s\n", - at91_get_soc_subtype(&at91_soc_initdata)); -} - void __iomem *at91_ramc_base[2]; EXPORT_SYMBOL_GPL(at91_ramc_base); @@ -429,13 +418,6 @@ static void at91_dt_ramc(void) at91_pm_set_standby(standby); } -void __init at91rm9200_dt_initialize(void) -{ - at91_dt_ramc(); - - at91_boot_soc.init(); -} - void __init at91_dt_initialize(void) { at91_dt_ramc(); diff --git a/arch/arm/mach-at91/sysirq_mask.c b/arch/arm/mach-at91/sysirq_mask.c deleted file mode 100644 index f8bc3511a8c8..000000000000 --- a/arch/arm/mach-at91/sysirq_mask.c +++ /dev/null @@ -1,75 +0,0 @@ -/* - * sysirq_mask.c - System-interrupt masking - * - * Copyright (C) 2013 Johan Hovold <jhovold@gmail.com> - * - * Functions to disable system interrupts from backup-powered peripherals. - * - * The RTC and RTT-peripherals are generally powered by backup power (VDDBU) - * and are not reset on wake-up, user, watchdog or software reset. This means - * that their interrupts may be enabled during early boot (e.g. after a user - * reset). - * - * As the RTC and RTT share the system-interrupt line with the PIT, an - * interrupt occurring before a handler has been installed would lead to the - * system interrupt being disabled and prevent the system from booting. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - */ - -#include <linux/io.h> -#include <mach/at91_rtt.h> - -#include "generic.h" - -#define AT91_RTC_IDR 0x24 /* Interrupt Disable Register */ -#define AT91_RTC_IMR 0x28 /* Interrupt Mask Register */ -#define AT91_RTC_IRQ_MASK 0x1f /* Available IRQs mask */ - -void __init at91_sysirq_mask_rtc(u32 rtc_base) -{ - void __iomem *base; - - base = ioremap(rtc_base, 64); - if (!base) - return; - - /* - * sam9x5 SoCs have the following errata: - * "RTC: Interrupt Mask Register cannot be used - * Interrupt Mask Register read always returns 0." - * - * Hence we're not relying on IMR values to disable - * interrupts. - */ - writel_relaxed(AT91_RTC_IRQ_MASK, base + AT91_RTC_IDR); - (void)readl_relaxed(base + AT91_RTC_IMR); /* flush */ - - iounmap(base); -} - -void __init at91_sysirq_mask_rtt(u32 rtt_base) -{ - void __iomem *base; - void __iomem *reg; - u32 mode; - - base = ioremap(rtt_base, 16); - if (!base) - return; - - reg = base + AT91_RTT_MR; - - mode = readl_relaxed(reg); - if (mode & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN)) { - pr_info("AT91: Disabling rtt irq\n"); - mode &= ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN); - writel_relaxed(mode, reg); - (void)readl_relaxed(reg); /* flush */ - } - - iounmap(base); -} diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index f15cddfeb897..f211dfb7b913 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -1141,34 +1141,6 @@ config RTC_DRV_AT91SAM9 probably want to use the real RTC block instead of the "RTT as an RTC" driver. -config RTC_DRV_AT91SAM9_RTT - int - range 0 1 - default 0 - depends on RTC_DRV_AT91SAM9 - help - This option is only relevant for legacy board support and - won't be used when booting a DT board. - - More than one RTT module is available. You can choose which - one will be used as an RTC. The default of zero is normally - OK to use, though some systems use that for non-RTC purposes. - -config RTC_DRV_AT91SAM9_GPBR - int - range 0 3 - default 0 - prompt "Backup Register Number" - depends on RTC_DRV_AT91SAM9 - help - This option is only relevant for legacy board support and - won't be used when booting a DT board. - - The RTC driver needs to use one of the General Purpose Backup - Registers (GPBRs) as well as the RTT. You can choose which one - will be used. The default of zero is normally OK to use, but - on some systems other software needs to use that register. - config RTC_DRV_AU1XXX tristate "Au1xxx Counter0 RTC support" depends on MIPS_ALCHEMY |
