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authorChao Xie <chao.xie@marvell.com>2014-10-31 10:13:46 +0800
committerMichael Turquette <mturquette@linaro.org>2014-11-12 16:34:00 -0800
commitcdce35460f5bd929cbcb75a8f436776bd0112f49 (patch)
tree00f8559dd38991327e643c86701c83faf5ceff4c /lib
parentee81f4ee2a3632a2d7928f680c4af8243a18762f (diff)
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clk: mmp: add mmp private gate clock
Some SOCes have this kind of the gate clock 1. There are some bits to control the gate not only one bit. 2. It is not always that "1" is to enable while "0" is to disable when write register. So we have to define the "mask", "enable_val", "disable_val" for this kind of gate clock. Signed-off-by: Chao Xie <chao.xie@marvell.com> Acked-by: Haojian Zhuang <haojian.zhuang@gmail.com> Signed-off-by: Michael Turquette <mturquette@linaro.org>
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