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authorJames Zhu <James.Zhu@amd.com>2017-09-29 16:47:31 -0400
committerAlex Deucher <alexander.deucher@amd.com>2017-10-06 17:44:11 -0400
commit65da0d40e561a717fee065d69d6e4f8d5b34db32 (patch)
treeb49c5bd822cbeb0713db9aeb190e29010a8f72f6 /include/drm
parente0128efb08b3d628d767ec8578e77cdd7ecc8f81 (diff)
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drm/amdgpu: add uvd enc irq
Add UVD encode IRQ handle and enable the UVD encode trap Signed-off-by: James Zhu <James.Zhu@amd.com> Reviewed-and-Tested-by: Leo Liu <leo.liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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