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authorJason Baron <jbaron@akamai.com>2014-07-04 13:27:04 +0200
committerBorislav Petkov <bp@suse.de>2014-07-04 13:27:30 +0200
commit3a044178cccfeb8664423c2950c499c3a209ed9f (patch)
tree8e9f4ba1747353932ed218157d05915b28b920c7 /include/asm-generic/io-64-nonatomic-lo-hi.h
parent6866b390562b2c948c6f6fc2a5c103f090a02e01 (diff)
downloadblackbird-obmc-linux-3a044178cccfeb8664423c2950c499c3a209ed9f.tar.gz
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readq/writeq: Add explicit lo_hi_[read|write]_q and hi_lo_[read|write]_q
Even on x86-64, I've found the need to break up a readq() into 2 readl() calls. According to the Intel datasheet for the E3-1200 processor: " Software must not access B0/D0/F0 32-bit memory-mapped registers with requests that cross a DW boundary. " (http://www.intel.com/content/www/us/en/processors/xeon/xeon-e3-1200-family-vol-2-datasheet.html p. 16) I can confirm this is true via several hard machine lockups. Thus, add explicit hi_lo_[readq|write]_q and lo_hi_[read|write]_q so that these uses are spelled out. Signed-off-by: Jason Baron <jbaron@akamai.com> Link: http://lkml.kernel.org/r/281f09da7ad01e5cea99737ec34d2399bdbbbf63.1403818526.git.jbaron@akamai.com Signed-off-by: Borislav Petkov <bp@suse.de>
Diffstat (limited to 'include/asm-generic/io-64-nonatomic-lo-hi.h')
-rw-r--r--include/asm-generic/io-64-nonatomic-lo-hi.h14
1 files changed, 9 insertions, 5 deletions
diff --git a/include/asm-generic/io-64-nonatomic-lo-hi.h b/include/asm-generic/io-64-nonatomic-lo-hi.h
index ca546b1ff8b5..0efacff0a1ce 100644
--- a/include/asm-generic/io-64-nonatomic-lo-hi.h
+++ b/include/asm-generic/io-64-nonatomic-lo-hi.h
@@ -4,8 +4,7 @@
#include <linux/io.h>
#include <asm-generic/int-ll64.h>
-#ifndef readq
-static inline __u64 readq(const volatile void __iomem *addr)
+static inline __u64 lo_hi_readq(const volatile void __iomem *addr)
{
const volatile u32 __iomem *p = addr;
u32 low, high;
@@ -15,14 +14,19 @@ static inline __u64 readq(const volatile void __iomem *addr)
return low + ((u64)high << 32);
}
-#endif
-#ifndef writeq
-static inline void writeq(__u64 val, volatile void __iomem *addr)
+static inline void lo_hi_writeq(__u64 val, volatile void __iomem *addr)
{
writel(val, addr);
writel(val >> 32, addr + 4);
}
+
+#ifndef readq
+#define readq lo_hi_readq
+#endif
+
+#ifndef writeq
+#define writeq lo_hi_writeq
#endif
#endif /* _ASM_IO_64_NONATOMIC_LO_HI_H_ */
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