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authorAndiry Xu <andiry.xu@amd.com>2011-09-23 14:19:50 -0700
committerGreg Kroah-Hartman <gregkh@suse.de>2011-09-26 15:51:09 -0700
commit6fd4562178508a0949c9fdecd8558d8b10d671bd (patch)
treeb6fbf5ca061ddaf8f87dff84e4eee74f1fc899ee /drivers/ssb/driver_gige.c
parentd2f52c9e585bbb1a3c164e02b8dcd0d996c67353 (diff)
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xHCI: Clear PLC for USB2 root hub ports
When the link state changes, xHC will report a port status change event and set the PORT_PLC bit, for both USB3 and USB2 root hub ports. The PLC will be cleared by usbcore for USB3 root hub ports, but not for USB2 ports, because they do not report USB_PORT_STAT_C_LINK_STATE in wPortChange. Clear it for USB2 root hub ports in handle_port_status(). Signed-off-by: Andiry Xu <andiry.xu@amd.com> Signed-off-by: Sarah Sharp <sarah.a.sharp@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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