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authorAlexander Duyck <alexander.h.duyck@intel.com>2017-12-29 08:50:55 -0500
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2018-02-12 10:56:16 -0800
commit4ff17929e6031bf3377233331223f617015e4ef3 (patch)
treec046d509e9bb73549294582ce4d5ef9c618e5068 /drivers/of/irq.c
parent8b99b1179c27958f51ecfc489af5f459f9408d96 (diff)
downloadblackbird-obmc-linux-4ff17929e6031bf3377233331223f617015e4ef3.tar.gz
blackbird-obmc-linux-4ff17929e6031bf3377233331223f617015e4ef3.zip
i40e/i40evf: Don't bother setting the CLEARPBA bit
The CLEARPBA bit in the dynamic interrupt control register actually has no effect either way on the hardware. As per errata 28 in the XL710 specification update the interrupt is actually cleared any time the register is written with the INTENA_MSK bit set to 0. As such the act of toggling the enable bit actually will trigger the interrupt being cleared and could lead to potential lost events if auto-masking is not enabled. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/of/irq.c')
0 files changed, 0 insertions, 0 deletions
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