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author | Archit Taneja <archit@ti.com> | 2013-12-12 05:35:58 -0300 |
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committer | Mauro Carvalho Chehab <m.chehab@samsung.com> | 2014-01-07 06:54:48 -0200 |
commit | 0df20f9657693c420b10e8d18f1472e0dd47d634 (patch) | |
tree | a75269443c5e9fd8012f5505d2935cf366a7871e /drivers/media/platform/ti-vpe/sc.c | |
parent | 44687b2e81165164d3b921e383592cc0f5e062a0 (diff) | |
download | blackbird-obmc-linux-0df20f9657693c420b10e8d18f1472e0dd47d634.tar.gz blackbird-obmc-linux-0df20f9657693c420b10e8d18f1472e0dd47d634.zip |
[media] v4l: ti-vpe: support loading of scaler coefficients
The SC block in VPE/VIP contains a SRAM within it. This internal memory
requires to be loaded with appropriate scaler coefficients from a contiguous
block of memory through VPDMA.
The horizontal and vertical scaler each require 2 sets of scaler coefficients
for luma and chroma scaling. The horizontal polyphase scaler requires
coefficients for a 32 phase and 8 tap filter. Similarly, the vertical scaler
requires coefficients for a 5 tap filter.
The choice of the scaler coefficients depends on the scaling ratio. Add
coefficient tables for different scaling ratios in sc_coeffs.h. In the case of
horizontal downscaling, we need to consider the change in ratio caused by
decimation performed by the horizontal scaler.
In order to load the scaler coefficients via VPDMA, a configuration descriptor
is used in block mode. The payload for the descriptor is the scaler coefficients
copied to memory. Coefficients for each phase have to be placed in memory in a
particular order understood by the scaler hardware.
The choice of the scaler coefficients, and the loading of the coefficients from
our tables to a contiguous buffer is managed by the functions
sc_set_hs_coefficients and sc_set_vs_coefficients.
The sc_data handle is now added with some parameters to describe the state of
the coefficients loaded in the SC block. 'loaded_coeff_h' and 'loaded_coeff_v'
hold the address of the last dma buffer which was used by VPDMA to copy
coefficients. This information can be used by a vpe mem-to-mem context to decide
whether it should load coefficients or not. 'hs_index' and 'vs_index' provide
some optimization by preventing loading of coefficients if the scaling ratio
didn't change between 2 contexts. 'load_coeff_h' and 'load_coeff_v' tell the
vpe/vip driver whether we need to load the coefficients through VPDMA or not.
Signed-off-by: Archit Taneja <archit@ti.com>
Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com>
Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
Diffstat (limited to 'drivers/media/platform/ti-vpe/sc.c')
-rw-r--r-- | drivers/media/platform/ti-vpe/sc.c | 98 |
1 files changed, 98 insertions, 0 deletions
diff --git a/drivers/media/platform/ti-vpe/sc.c b/drivers/media/platform/ti-vpe/sc.c index f21dfbb77057..417feb9f1f79 100644 --- a/drivers/media/platform/ti-vpe/sc.c +++ b/drivers/media/platform/ti-vpe/sc.c @@ -18,6 +18,7 @@ #include <linux/slab.h> #include "sc.h" +#include "sc_coeff.h" void sc_set_regs_bypass(struct sc_data *sc, u32 *sc_reg0) { @@ -61,6 +62,103 @@ void sc_dump_regs(struct sc_data *sc) #undef DUMPREG } +/* + * set the horizontal scaler coefficients according to the ratio of output to + * input widths, after accounting for up to two levels of decimation + */ +void sc_set_hs_coeffs(struct sc_data *sc, void *addr, unsigned int src_w, + unsigned int dst_w) +{ + int sixteenths; + int idx; + int i, j; + u16 *coeff_h = addr; + const u16 *cp; + + if (dst_w > src_w) { + idx = HS_UP_SCALE; + } else { + if ((dst_w << 1) < src_w) + dst_w <<= 1; /* first level decimation */ + if ((dst_w << 1) < src_w) + dst_w <<= 1; /* second level decimation */ + + if (dst_w == src_w) { + idx = HS_LE_16_16_SCALE; + } else { + sixteenths = (dst_w << 4) / src_w; + if (sixteenths < 8) + sixteenths = 8; + idx = HS_LT_9_16_SCALE + sixteenths - 8; + } + } + + if (idx == sc->hs_index) + return; + + cp = scaler_hs_coeffs[idx]; + + for (i = 0; i < SC_NUM_PHASES * 2; i++) { + for (j = 0; j < SC_H_NUM_TAPS; j++) + *coeff_h++ = *cp++; + /* + * for each phase, the scaler expects space for 8 coefficients + * in it's memory. For the horizontal scaler, we copy the first + * 7 coefficients and skip the last slot to move to the next + * row to hold coefficients for the next phase + */ + coeff_h += SC_NUM_TAPS_MEM_ALIGN - SC_H_NUM_TAPS; + } + + sc->hs_index = idx; + + sc->load_coeff_h = true; +} + +/* + * set the vertical scaler coefficients according to the ratio of output to + * input heights + */ +void sc_set_vs_coeffs(struct sc_data *sc, void *addr, unsigned int src_h, + unsigned int dst_h) +{ + int sixteenths; + int idx; + int i, j; + u16 *coeff_v = addr; + const u16 *cp; + + if (dst_h > src_h) { + idx = VS_UP_SCALE; + } else if (dst_h == src_h) { + idx = VS_1_TO_1_SCALE; + } else { + sixteenths = (dst_h << 4) / src_h; + if (sixteenths < 8) + sixteenths = 8; + idx = VS_LT_9_16_SCALE + sixteenths - 8; + } + + if (idx == sc->vs_index) + return; + + cp = scaler_vs_coeffs[idx]; + + for (i = 0; i < SC_NUM_PHASES * 2; i++) { + for (j = 0; j < SC_V_NUM_TAPS; j++) + *coeff_v++ = *cp++; + /* + * for the vertical scaler, we copy the first 5 coefficients and + * skip the last 3 slots to move to the next row to hold + * coefficients for the next phase + */ + coeff_v += SC_NUM_TAPS_MEM_ALIGN - SC_V_NUM_TAPS; + } + + sc->vs_index = idx; + sc->load_coeff_v = true; +} + struct sc_data *sc_create(struct platform_device *pdev) { struct sc_data *sc; |