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authorAntti Palosaari <crope@iki.fi>2013-12-02 01:39:24 -0300
committerMauro Carvalho Chehab <m.chehab@samsung.com>2013-12-19 09:21:56 -0200
commitc19314b09bc0839736f2c74422b21de36a86e7b7 (patch)
treeddbcde74a7899403d093894005ea8e16c7b55cf7 /drivers/media/dvb-frontends/m88ds3103_priv.h
parent92676ac92738c29a439d959964f2a89d73150333 (diff)
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[media] m88ts2022: reimplement synthesizer calculations
Used synthesizer is very typical integer-N PLL, with configurable reference frequency divider, output frequency divider and of course N itself. Most common method to calculate values is first select output divider, then calculate VCO frequency and finally calculate PLL N from VCO frequency. Do it that way. Also make some cleanups for filter logic and signal strength. Signed-off-by: Antti Palosaari <crope@iki.fi> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
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