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authorCaesar Wang <wxt@rock-chips.com>2015-10-27 15:31:45 +0800
committerJassi Brar <jaswinder.singh@linaro.org>2016-03-11 10:40:06 +0700
commitf70ed3b5dc8b0810a01a24b198eca3f562aedc14 (patch)
treed4cf1f751bf836ff32d105791eb3b0721e5f8fac /drivers/mailbox/Kconfig
parenta7065bc37b6764df681d12b1059415a0a262c4e0 (diff)
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mailbox: rockchip: Add Rockchip mailbox driver
This driver is found on RK3368 SoCs. The Mailbox module is a simple APB peripheral that allows both the Cortex-A53 MCU system to communicate by writing operation to generate interrupt. The registers are accessible by both CPU via APB interface. The Mailbox has the following main features: 1) Support dual-core system: Cortex-A53 and MCU. 2) Support APB interface. 3) Support four mailbox elements, each element includes one data word, one command word register and one flag bit that can represent one interrupt. 4) Four interrupts to Cortex-A53. 5) Four interrupts to MCU. 6) Provide 32 lock registers for software to use to indicate whether mailbox is occupied. [Jassi: Removed unused variable buf_base] Signed-off-by: Caesar Wang <wxt@rock-chips.com> Signed-off-by: Jassi Brar <jaswinder.singh@linaro.org>
Diffstat (limited to 'drivers/mailbox/Kconfig')
-rw-r--r--drivers/mailbox/Kconfig9
1 files changed, 9 insertions, 0 deletions
diff --git a/drivers/mailbox/Kconfig b/drivers/mailbox/Kconfig
index 642da1c812bf..09719843ad4a 100644
--- a/drivers/mailbox/Kconfig
+++ b/drivers/mailbox/Kconfig
@@ -43,6 +43,15 @@ config OMAP_MBOX_KFIFO_SIZE
This can also be changed at runtime (via the mbox_kfifo_size
module parameter).
+config ROCKCHIP_MBOX
+ bool "Rockchip Soc Intergrated Mailbox Support"
+ depends on ARCH_ROCKCHIP || COMPILE_TEST
+ help
+ This driver provides support for inter-processor communication
+ between CPU cores and MCU processor on Some Rockchip SOCs.
+ Please check it that the Soc you use have Mailbox hardware.
+ Say Y here if you want to use the Rockchip Mailbox support.
+
config PCC
bool "Platform Communication Channel Driver"
depends on ACPI
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