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authorAlex Deucher <alexander.deucher@amd.com>2012-07-11 18:02:10 -0400
committerAlex Deucher <alexander.deucher@amd.com>2013-06-26 16:11:39 -0400
commitd798f2f2c3caee220a437697569fb519db5e643a (patch)
tree9b44594c9a7be3f0cf21777118ab3cdbee376caf /drivers/gpu/drm/radeon/atombios_encoders.c
parent9e05fa1d24667fc2008e7f631aefd09acad80d77 (diff)
downloadblackbird-obmc-linux-d798f2f2c3caee220a437697569fb519db5e643a.tar.gz
blackbird-obmc-linux-d798f2f2c3caee220a437697569fb519db5e643a.zip
drm/radeon/dce8: properly handle interlaced timing
The register bits changed on DCE8 compared to previous families. Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/radeon/atombios_encoders.c')
-rw-r--r--drivers/gpu/drm/radeon/atombios_encoders.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/drivers/gpu/drm/radeon/atombios_encoders.c b/drivers/gpu/drm/radeon/atombios_encoders.c
index 4120d355cadd..44394199c45d 100644
--- a/drivers/gpu/drm/radeon/atombios_encoders.c
+++ b/drivers/gpu/drm/radeon/atombios_encoders.c
@@ -1962,7 +1962,13 @@ atombios_apply_encoder_quirks(struct drm_encoder *encoder,
/* set scaler clears this on some chips */
if (ASIC_IS_AVIVO(rdev) &&
(!(radeon_encoder->active_device & (ATOM_DEVICE_TV_SUPPORT)))) {
- if (ASIC_IS_DCE4(rdev)) {
+ if (ASIC_IS_DCE8(rdev)) {
+ if (mode->flags & DRM_MODE_FLAG_INTERLACE)
+ WREG32(CIK_LB_DATA_FORMAT + radeon_crtc->crtc_offset,
+ CIK_INTERLEAVE_EN);
+ else
+ WREG32(CIK_LB_DATA_FORMAT + radeon_crtc->crtc_offset, 0);
+ } else if (ASIC_IS_DCE4(rdev)) {
if (mode->flags & DRM_MODE_FLAG_INTERLACE)
WREG32(EVERGREEN_DATA_FORMAT + radeon_crtc->crtc_offset,
EVERGREEN_INTERLEAVE_EN);
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