diff options
author | Ben Skeggs <bskeggs@redhat.com> | 2015-01-14 09:57:36 +1000 |
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committer | Ben Skeggs <bskeggs@redhat.com> | 2015-01-22 12:17:43 +1000 |
commit | 5ce3bf3c72436c49fbd9a5b71d7d278665f4bf55 (patch) | |
tree | f2aaba0aa92d945db18b68c93f53723ab4659807 /drivers/gpu/drm/nouveau/nvkm/engine/dmaobj | |
parent | ebb58dc2ef8c62d1affa28160f57faa7b0e1dc02 (diff) | |
download | blackbird-obmc-linux-5ce3bf3c72436c49fbd9a5b71d7d278665f4bf55.tar.gz blackbird-obmc-linux-5ce3bf3c72436c49fbd9a5b71d7d278665f4bf55.zip |
drm/nouveau/mmu: rename from vmmgr (no binary change)
Switch to NVIDIA's name for the device.
The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver. This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).
Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.
A comparison of objdump disassemblies proves no code changes.
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
Diffstat (limited to 'drivers/gpu/drm/nouveau/nvkm/engine/dmaobj')
-rw-r--r-- | drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nv04.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nv04.c b/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nv04.c index 20c9dbfe3b2e..8089310f1157 100644 --- a/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nv04.c +++ b/drivers/gpu/drm/nouveau/nvkm/engine/dmaobj/nv04.c @@ -26,7 +26,7 @@ #include <nvif/class.h> #include <subdev/fb.h> -#include <subdev/vm/nv04.h> +#include <subdev/mmu/nv04.h> #include "priv.h" @@ -62,8 +62,8 @@ nv04_dmaobj_bind(struct nouveau_dmaobj *dmaobj, } if (priv->clone) { - struct nv04_vmmgr_priv *vmm = nv04_vmmgr(dmaobj); - struct nouveau_gpuobj *pgt = vmm->vm->pgt[0].obj[0]; + struct nv04_mmu_priv *mmu = nv04_mmu(dmaobj); + struct nouveau_gpuobj *pgt = mmu->vm->pgt[0].obj[0]; if (!dmaobj->start) return nouveau_gpuobj_dup(parent, pgt, pgpuobj); offset = nv_ro32(pgt, 8 + (offset >> 10)); @@ -88,7 +88,7 @@ nv04_dmaobj_ctor(struct nouveau_object *parent, struct nouveau_object *engine, struct nouveau_object **pobject) { struct nouveau_dmaeng *dmaeng = (void *)engine; - struct nv04_vmmgr_priv *vmm = nv04_vmmgr(engine); + struct nv04_mmu_priv *mmu = nv04_mmu(engine); struct nv04_dmaobj_priv *priv; int ret; @@ -98,7 +98,7 @@ nv04_dmaobj_ctor(struct nouveau_object *parent, struct nouveau_object *engine, return ret; if (priv->base.target == NV_MEM_TARGET_VM) { - if (nv_object(vmm)->oclass == &nv04_vmmgr_oclass) + if (nv_object(mmu)->oclass == &nv04_mmu_oclass) priv->clone = true; priv->base.target = NV_MEM_TARGET_PCI; priv->base.access = NV_MEM_ACCESS_RW; |