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| author | Chris Wilson <chris@chris-wilson.co.uk> | 2018-02-05 15:24:30 +0000 |
|---|---|---|
| committer | Chris Wilson <chris@chris-wilson.co.uk> | 2018-02-05 15:27:25 +0000 |
| commit | e840130a25a7fbe1520f32b6113e0fd68af0fb54 (patch) | |
| tree | f87c6f356b09ef6ff3d443ca43bd1abc73a6d7a8 /drivers/gpu/drm/i915 | |
| parent | 8ec21a7c4b52165211b47932c665ab2e9ca488ee (diff) | |
| download | blackbird-obmc-linux-e840130a25a7fbe1520f32b6113e0fd68af0fb54.tar.gz blackbird-obmc-linux-e840130a25a7fbe1520f32b6113e0fd68af0fb54.zip | |
drm/i915/execlists: Move the reset bits to a more natural home
In preparation for the next patch, we want the engine to appear idle
after a reset (if there are no requests in flight). For execlists, this
entails clearing the active status on reset, it will be regenerated on
restarting the engine after the reset. In the process, note that a
couple of other status flags and checks could be moved into the
describing function.
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180205152431.12163-3-chris@chris-wilson.co.uk
Diffstat (limited to 'drivers/gpu/drm/i915')
| -rw-r--r-- | drivers/gpu/drm/i915/intel_lrc.c | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index afc41dbc872e..adf257dfa5e0 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -1462,6 +1462,9 @@ static void enable_execlists(struct intel_engine_cs *engine) I915_WRITE(RING_HWS_PGA(engine->mmio_base), engine->status_page.ggtt_offset); POSTING_READ(RING_HWS_PGA(engine->mmio_base)); + + /* Following the reset, we need to reload the CSB read/write pointers */ + engine->execlists.csb_head = -1; } static int gen8_init_common_ring(struct intel_engine_cs *engine) @@ -1478,11 +1481,6 @@ static int gen8_init_common_ring(struct intel_engine_cs *engine) enable_execlists(engine); - GEM_BUG_ON(engine->id >= ARRAY_SIZE(gtiir)); - - execlists->csb_head = -1; - execlists->active = 0; - /* After a GPU reset, we may have requests to replay */ if (execlists->first) tasklet_schedule(&execlists->tasklet); @@ -1528,6 +1526,8 @@ static void reset_irq(struct intel_engine_cs *engine) struct drm_i915_private *dev_priv = engine->i915; int i; + GEM_BUG_ON(engine->id >= ARRAY_SIZE(gtiir)); + /* * Clear any pending interrupt state. * @@ -1576,6 +1576,9 @@ static void reset_common_ring(struct intel_engine_cs *engine, spin_unlock_irqrestore(&engine->timeline->lock, flags); + /* Mark all CS interrupts as complete */ + execlists->active = 0; + /* If the request was innocent, we leave the request in the ELSP * and will try to replay it on restarting. The context image may * have been corrupted by the reset, in which case we may have |
