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author | Arnd Bergmann <arnd@arndb.de> | 2013-06-20 02:06:36 +0200 |
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committer | Arnd Bergmann <arnd@arndb.de> | 2013-06-20 02:06:36 +0200 |
commit | d5a51af940efec07c969bdb5fe478bb518116404 (patch) | |
tree | 26291e51122081d929e3cac3d441ee5efbfa75d6 /drivers/gpu/drm/i915/intel_sdvo.c | |
parent | a44bde66bec168889c95bd1d0d15834b02387901 (diff) | |
parent | d75f3d92e86e65b3cb9725e65f7278cc303511db (diff) | |
download | blackbird-obmc-linux-d5a51af940efec07c969bdb5fe478bb518116404.tar.gz blackbird-obmc-linux-d5a51af940efec07c969bdb5fe478bb518116404.zip |
Merge tag 'mxs-dt-3.11' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/dt
From Shawn Guo:
mxs device tree changes for 3.11:
* A couple of new board support, cfa10055 and cfa10057
* A few updates on cfa10036 device tree source
* Some auart pinctrl data addition
* Adopt soc bus infrastructure for mach-mxs
* tag 'mxs-dt-3.11' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: mxs: dt: Add Crystalfontz CFA-10057 device tree
ARM: mxs: dt: Add the Crystalfontz CFA-10055 device tree
ARM: cfa10049: Switch the chip select pin of the LCD controller
ARM: cfa10036: Add USB0 OTG port
ARM: dts: apf28dev: Add touchscreen support for APF28dev
ARM: mxs: Fix UARTs on M28EVK
ARM: cfa10036: dt: Change i2c0 clock frequency
ARM: dts: cfa10036: Change the OLED display to SSD1306
ARM: mx28: add auart4 2 pins pinmux to imx28.dtsi
ARM: mx28: add auart3 2 pins pinmux to imx28.dtsi
ARM: mx28: add auart2 2 pins pinmux to imx28.dtsi
ARM: mxs: Use soc bus infrastructure
ARM: dts: mx28: Adjust the digctl compatible string
ARM: mxs: Remove init_irq declaration in machine description
Includes an update to 3.10-rc6
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'drivers/gpu/drm/i915/intel_sdvo.c')
-rw-r--r-- | drivers/gpu/drm/i915/intel_sdvo.c | 24 |
1 files changed, 14 insertions, 10 deletions
diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c index 4c47b449b775..d4ea6c265ce1 100644 --- a/drivers/gpu/drm/i915/intel_sdvo.c +++ b/drivers/gpu/drm/i915/intel_sdvo.c @@ -1777,10 +1777,13 @@ static void intel_sdvo_get_lvds_modes(struct drm_connector *connector) * arranged in priority order. */ intel_ddc_get_modes(connector, &intel_sdvo->ddc); - if (list_empty(&connector->probed_modes) == false) - goto end; - /* Fetch modes from VBT */ + /* + * Fetch modes from VBT. For SDVO prefer the VBT mode since some + * SDVO->LVDS transcoders can't cope with the EDID mode. Since + * drm_mode_probed_add adds the mode at the head of the list we add it + * last. + */ if (dev_priv->sdvo_lvds_vbt_mode != NULL) { newmode = drm_mode_duplicate(connector->dev, dev_priv->sdvo_lvds_vbt_mode); @@ -1792,7 +1795,6 @@ static void intel_sdvo_get_lvds_modes(struct drm_connector *connector) } } -end: list_for_each_entry(newmode, &connector->probed_modes, head) { if (newmode->type & DRM_MODE_TYPE_PREFERRED) { intel_sdvo->sdvo_lvds_fixed_mode = @@ -2790,12 +2792,6 @@ bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob) SDVOB_HOTPLUG_INT_STATUS_I915 : SDVOC_HOTPLUG_INT_STATUS_I915; } - /* Only enable the hotplug irq if we need it, to work around noisy - * hotplug lines. - */ - if (intel_sdvo->hotplug_active) - intel_encoder->hpd_pin = HPD_SDVO_B ? HPD_SDVO_B : HPD_SDVO_C; - intel_encoder->compute_config = intel_sdvo_compute_config; intel_encoder->disable = intel_disable_sdvo; intel_encoder->mode_set = intel_sdvo_mode_set; @@ -2814,6 +2810,14 @@ bool intel_sdvo_init(struct drm_device *dev, uint32_t sdvo_reg, bool is_sdvob) goto err_output; } + /* Only enable the hotplug irq if we need it, to work around noisy + * hotplug lines. + */ + if (intel_sdvo->hotplug_active) { + intel_encoder->hpd_pin = + intel_sdvo->is_sdvob ? HPD_SDVO_B : HPD_SDVO_C; + } + /* * Cloning SDVO with anything is often impossible, since the SDVO * encoder can request a special input timing mode. And even if that's |