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authorStephen Boyd <sboyd@codeaurora.org>2015-07-30 17:20:57 -0700
committerMichael Turquette <mturquette@baylibre.com>2015-08-24 16:48:58 -0700
commita53ad8ef3dccb0c5482c60a3f6b8c0cbd498efe5 (patch)
tree4600c88e5c26787acac40cbc2d1e667e1cac805b /drivers/clk/ti/dpll44xx.c
parent5cdb1dc50be615aa26f8952e4b6f67b483849e97 (diff)
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clk: ti: Convert to clk_hw based provider APIs
We're removing struct clk from the clk provider API, so switch this code to using the clk_hw based provider APIs. Acked-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/ti/dpll44xx.c')
-rw-r--r--drivers/clk/ti/dpll44xx.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/clk/ti/dpll44xx.c b/drivers/clk/ti/dpll44xx.c
index 73af77a90586..660d7436ac24 100644
--- a/drivers/clk/ti/dpll44xx.c
+++ b/drivers/clk/ti/dpll44xx.c
@@ -94,7 +94,7 @@ static void omap4_dpll_lpmode_recalc(struct dpll_data *dd)
{
long fint, fout;
- fint = __clk_get_rate(dd->clk_ref) / (dd->last_rounded_n + 1);
+ fint = clk_get_rate(dd->clk_ref) / (dd->last_rounded_n + 1);
fout = fint * dd->last_rounded_m;
if ((fint < OMAP4_DPLL_LP_FINT_MAX) && (fout < OMAP4_DPLL_LP_FOUT_MAX))
@@ -212,7 +212,7 @@ int omap4_dpll_regm4xen_determine_rate(struct clk_hw *hw,
if (!dd)
return -EINVAL;
- if (__clk_get_rate(dd->clk_bypass) == req->rate &&
+ if (clk_get_rate(dd->clk_bypass) == req->rate &&
(dd->modes & (1 << DPLL_LOW_POWER_BYPASS))) {
req->best_parent_hw = __clk_get_hw(dd->clk_bypass);
} else {
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