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| author | Gabriel Fernandez <gabriel.fernandez@linaro.org> | 2015-10-07 11:08:57 +0200 |
|---|---|---|
| committer | Stephen Boyd <sboyd@codeaurora.org> | 2015-10-08 23:52:58 -0700 |
| commit | 46a57afdd70c17cf15b2077c5ea611913f80f85f (patch) | |
| tree | cbf4f7eb306e7a7bbb7f42b1c30820b48c5b6710 /drivers/clk/st/clkgen-mux.c | |
| parent | fb4738629b6c06c24ba0649ece20ecec978d8694 (diff) | |
| download | blackbird-obmc-linux-46a57afdd70c17cf15b2077c5ea611913f80f85f.tar.gz blackbird-obmc-linux-46a57afdd70c17cf15b2077c5ea611913f80f85f.zip | |
drivers: clk: st: PLL rate change implementation for DVFS
Change A9 PLL rate, as per requirement from the cpufreq framework,
for DVFS. For rate change, the A9 clock needs to be temporarily sourced
from PLL external to A9 and then sourced back to A9-PLL
Signed-off-by: Pankaj Dev <pankaj.dev@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'drivers/clk/st/clkgen-mux.c')
| -rw-r--r-- | drivers/clk/st/clkgen-mux.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/clk/st/clkgen-mux.c b/drivers/clk/st/clkgen-mux.c index 4f7f6c00b219..5dc5ce217960 100644 --- a/drivers/clk/st/clkgen-mux.c +++ b/drivers/clk/st/clkgen-mux.c @@ -17,6 +17,7 @@ #include <linux/of_address.h> #include <linux/clk.h> #include <linux/clk-provider.h> +#include "clkgen.h" static DEFINE_SPINLOCK(clkgena_divmux_lock); static DEFINE_SPINLOCK(clkgenf_lock); @@ -576,6 +577,7 @@ static struct clkgen_mux_data stih415_a9_mux_data = { .offset = 0, .shift = 1, .width = 2, + .lock = &clkgen_a9_lock, }; static struct clkgen_mux_data stih416_a9_mux_data = { .offset = 0, @@ -586,6 +588,7 @@ static struct clkgen_mux_data stih407_a9_mux_data = { .offset = 0x1a4, .shift = 0, .width = 2, + .lock = &clkgen_a9_lock, }; static const struct of_device_id mux_of_match[] = { |
