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| author | Myron Stowe <mstowe@redhat.com> | 2011-10-28 15:47:42 -0600 |
|---|---|---|
| committer | Jesse Barnes <jbarnes@virtuousgeek.org> | 2012-01-06 12:10:36 -0800 |
| commit | 168c8619fd825d80d1753bf298d0b6aa8d739623 (patch) | |
| tree | 4a222d7f6f4841365217b689ea3c20cea3f1e2f7 /arch | |
| parent | cfce9fb808d7d25f6ea18a804eb71b08c7d777c1 (diff) | |
| download | blackbird-obmc-linux-168c8619fd825d80d1753bf298d0b6aa8d739623.tar.gz blackbird-obmc-linux-168c8619fd825d80d1753bf298d0b6aa8d739623.zip | |
PCI: ARM: convert pcibios_set_master() to a non-inlined function
This patch converts ARM's architecture-specific inlined
'pcibios_set_master()' routine to a non-inlined function. This will
allow follow on patches to create a generic 'pcibios_set_master()'
function using the '__weak' attribute which can be used by all
architectures as a default which, if necessary, can then be over-
ridden by architecture-specific code.
Converting 'pci_bios_set_master()' to a non-inlined function will allow
ARM's 'pcibios_set_master()' implementation to remain architecture-
specific after the generic version is introduced and thus, not change
current behavior.
Note that ARM also has a non-inlined 'pcibios_set_master()' that is
used if CONFIG_PCI_HOST_ITE8152 is defined. This patch does not
change any behavior here either.
No functional change.
Signed-off-by: Myron Stowe <myron.stowe@redhat.com>
Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/arm/common/it8152.c | 3 | ||||
| -rw-r--r-- | arch/arm/include/asm/pci.h | 12 | ||||
| -rw-r--r-- | arch/arm/kernel/bios32.c | 7 |
3 files changed, 10 insertions, 12 deletions
diff --git a/arch/arm/common/it8152.c b/arch/arm/common/it8152.c index b539ec855e1a..9a6f5371d135 100644 --- a/arch/arm/common/it8152.c +++ b/arch/arm/common/it8152.c @@ -327,6 +327,9 @@ err0: */ unsigned int pcibios_max_latency = 255; +/* ITE bridge requires setting latency timer to avoid early bus access + termination by PCI bus master devices +*/ void pcibios_set_master(struct pci_dev *dev) { u8 lat; diff --git a/arch/arm/include/asm/pci.h b/arch/arm/include/asm/pci.h index 2b1f245db0c6..da337ba57ffd 100644 --- a/arch/arm/include/asm/pci.h +++ b/arch/arm/include/asm/pci.h @@ -31,18 +31,6 @@ static inline int pci_proc_domain(struct pci_bus *bus) } #endif /* CONFIG_PCI_DOMAINS */ -#ifdef CONFIG_PCI_HOST_ITE8152 -/* ITE bridge requires setting latency timer to avoid early bus access - termination by PIC bus mater devices -*/ -extern void pcibios_set_master(struct pci_dev *dev); -#else -static inline void pcibios_set_master(struct pci_dev *dev) -{ - /* No special bus mastering setup handling */ -} -#endif - static inline void pcibios_penalize_isa_irq(int irq, int active) { /* We don't do dynamic PCI IRQ allocation */ diff --git a/arch/arm/kernel/bios32.c b/arch/arm/kernel/bios32.c index b530e9116a0c..4e606073f89d 100644 --- a/arch/arm/kernel/bios32.c +++ b/arch/arm/kernel/bios32.c @@ -571,6 +571,13 @@ void __init pci_common_init(struct hw_pci *hw) } } +#ifndef CONFIG_PCI_HOST_ITE8152 +void pcibios_set_master(struct pci_dev *dev) +{ + /* No special bus mastering setup handling */ +} +#endif + char * __init pcibios_setup(char *str) { if (!strcmp(str, "debug")) { |
