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authorRusty Russell <rusty@rustcorp.com.au>2009-03-13 14:49:57 +1030
committerRusty Russell <rusty@rustcorp.com.au>2009-03-13 14:49:57 +1030
commit73e907de7d5cecef43d9949ab8f4fdca508168c7 (patch)
treef1e623cbc0685cd8e36ba7d4ee75fd2c5191db15 /arch/x86/kernel/apic/summit_32.c
parent76ba0ecda0de9accea9a91cb6dbde46782110e1c (diff)
downloadblackbird-obmc-linux-73e907de7d5cecef43d9949ab8f4fdca508168c7.tar.gz
blackbird-obmc-linux-73e907de7d5cecef43d9949ab8f4fdca508168c7.zip
cpumask: remove x86 cpumask_t uses.
Impact: cleanup We are removing cpumask_t in favour of struct cpumask: mainly as a marker of what code is now CONFIG_CPUMASK_OFFSTACK-safe. The only non-trivial change here is vector_allocation_domain(): explicitly clear the mask and set the first word, rather than using assignment. Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Diffstat (limited to 'arch/x86/kernel/apic/summit_32.c')
-rw-r--r--arch/x86/kernel/apic/summit_32.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/x86/kernel/apic/summit_32.c b/arch/x86/kernel/apic/summit_32.c
index 278e863c71b5..9cfe1f415d81 100644
--- a/arch/x86/kernel/apic/summit_32.c
+++ b/arch/x86/kernel/apic/summit_32.c
@@ -182,7 +182,7 @@ static inline int is_WPEG(struct rio_detail *rio){
#define SUMMIT_APIC_DFR_VALUE (APIC_DFR_CLUSTER)
-static const cpumask_t *summit_target_cpus(void)
+static const struct cpumask *summit_target_cpus(void)
{
/* CPU_MASK_ALL (0xff) has undefined behaviour with
* dest_LowestPrio mode logical clustered apic interrupt routing
@@ -285,7 +285,7 @@ static int summit_check_phys_apicid_present(int boot_cpu_physical_apicid)
return 1;
}
-static unsigned int summit_cpu_mask_to_apicid(const cpumask_t *cpumask)
+static unsigned int summit_cpu_mask_to_apicid(const struct cpumask *cpumask)
{
unsigned int round = 0;
int cpu, apicid = 0;
@@ -342,7 +342,7 @@ static int probe_summit(void)
return 0;
}
-static void summit_vector_allocation_domain(int cpu, cpumask_t *retmask)
+static void summit_vector_allocation_domain(int cpu, struct cpumask *retmask)
{
/* Careful. Some cpus do not strictly honor the set of cpus
* specified in the interrupt destination when using lowest
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