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author | Linus Torvalds <torvalds@linux-foundation.org> | 2018-01-31 11:32:27 -0800 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2018-01-31 11:32:27 -0800 |
commit | 2382dc9a3eca644147be83dd2cd0dd64dc9e3e8c (patch) | |
tree | 71a152721a9b9b11875bf5ea053edb72c9b3a94e /arch/powerpc/platforms | |
parent | 28bc6fb9596fe1e577d09fc17ee6e1bb051c6ba3 (diff) | |
parent | 04f56534786c885f578c24461bcd782fe9a787cf (diff) | |
download | blackbird-obmc-linux-2382dc9a3eca644147be83dd2cd0dd64dc9e3e8c.tar.gz blackbird-obmc-linux-2382dc9a3eca644147be83dd2cd0dd64dc9e3e8c.zip |
Merge tag 'dma-mapping-4.16' of git://git.infradead.org/users/hch/dma-mapping
Pull dma mapping updates from Christoph Hellwig:
"Except for a runtime warning fix from Christian this is all about
consolidation of the generic no-IOMMU code, a well as the glue code
for swiotlb.
All the code is based on the x86 implementation with hooks to allow
all architectures that aren't cache coherent to use it.
The x86 conversion itself has been deferred because the x86
maintainers were a little busy in the last months"
* tag 'dma-mapping-4.16' of git://git.infradead.org/users/hch/dma-mapping: (57 commits)
MAINTAINERS: add the iommu list for swiotlb and xen-swiotlb
arm64: use swiotlb_alloc and swiotlb_free
arm64: replace ZONE_DMA with ZONE_DMA32
mips: use swiotlb_{alloc,free}
mips/netlogic: remove swiotlb support
tile: use generic swiotlb_ops
tile: replace ZONE_DMA with ZONE_DMA32
unicore32: use generic swiotlb_ops
ia64: remove an ifdef around the content of pci-dma.c
ia64: clean up swiotlb support
ia64: use generic swiotlb_ops
ia64: replace ZONE_DMA with ZONE_DMA32
swiotlb: remove various exports
swiotlb: refactor coherent buffer allocation
swiotlb: refactor coherent buffer freeing
swiotlb: wire up ->dma_supported in swiotlb_dma_ops
swiotlb: add common swiotlb_map_ops
swiotlb: rename swiotlb_free to swiotlb_exit
x86: rename swiotlb_dma_ops
powerpc: rename swiotlb_dma_ops
...
Diffstat (limited to 'arch/powerpc/platforms')
-rw-r--r-- | arch/powerpc/platforms/cell/iommu.c | 28 | ||||
-rw-r--r-- | arch/powerpc/platforms/pasemi/iommu.c | 2 | ||||
-rw-r--r-- | arch/powerpc/platforms/pasemi/setup.c | 2 | ||||
-rw-r--r-- | arch/powerpc/platforms/powernv/pci-ioda.c | 4 | ||||
-rw-r--r-- | arch/powerpc/platforms/pseries/iommu.c | 2 | ||||
-rw-r--r-- | arch/powerpc/platforms/pseries/vio.c | 2 |
6 files changed, 20 insertions, 20 deletions
diff --git a/arch/powerpc/platforms/cell/iommu.c b/arch/powerpc/platforms/cell/iommu.c index 4b91ad08eefd..12352a58072a 100644 --- a/arch/powerpc/platforms/cell/iommu.c +++ b/arch/powerpc/platforms/cell/iommu.c @@ -541,7 +541,7 @@ static struct cbe_iommu *cell_iommu_for_node(int nid) return NULL; } -static unsigned long cell_dma_direct_offset; +static unsigned long cell_dma_nommu_offset; static unsigned long dma_iommu_fixed_base; @@ -580,7 +580,7 @@ static void *dma_fixed_alloc_coherent(struct device *dev, size_t size, device_to_mask(dev), flag, dev_to_node(dev)); else - return dma_direct_ops.alloc(dev, size, dma_handle, flag, + return dma_nommu_ops.alloc(dev, size, dma_handle, flag, attrs); } @@ -592,7 +592,7 @@ static void dma_fixed_free_coherent(struct device *dev, size_t size, iommu_free_coherent(cell_get_iommu_table(dev), size, vaddr, dma_handle); else - dma_direct_ops.free(dev, size, vaddr, dma_handle, attrs); + dma_nommu_ops.free(dev, size, vaddr, dma_handle, attrs); } static dma_addr_t dma_fixed_map_page(struct device *dev, struct page *page, @@ -601,7 +601,7 @@ static dma_addr_t dma_fixed_map_page(struct device *dev, struct page *page, unsigned long attrs) { if (iommu_fixed_is_weak == (attrs & DMA_ATTR_WEAK_ORDERING)) - return dma_direct_ops.map_page(dev, page, offset, size, + return dma_nommu_ops.map_page(dev, page, offset, size, direction, attrs); else return iommu_map_page(dev, cell_get_iommu_table(dev), page, @@ -614,7 +614,7 @@ static void dma_fixed_unmap_page(struct device *dev, dma_addr_t dma_addr, unsigned long attrs) { if (iommu_fixed_is_weak == (attrs & DMA_ATTR_WEAK_ORDERING)) - dma_direct_ops.unmap_page(dev, dma_addr, size, direction, + dma_nommu_ops.unmap_page(dev, dma_addr, size, direction, attrs); else iommu_unmap_page(cell_get_iommu_table(dev), dma_addr, size, @@ -626,7 +626,7 @@ static int dma_fixed_map_sg(struct device *dev, struct scatterlist *sg, unsigned long attrs) { if (iommu_fixed_is_weak == (attrs & DMA_ATTR_WEAK_ORDERING)) - return dma_direct_ops.map_sg(dev, sg, nents, direction, attrs); + return dma_nommu_ops.map_sg(dev, sg, nents, direction, attrs); else return ppc_iommu_map_sg(dev, cell_get_iommu_table(dev), sg, nents, device_to_mask(dev), @@ -638,7 +638,7 @@ static void dma_fixed_unmap_sg(struct device *dev, struct scatterlist *sg, unsigned long attrs) { if (iommu_fixed_is_weak == (attrs & DMA_ATTR_WEAK_ORDERING)) - dma_direct_ops.unmap_sg(dev, sg, nents, direction, attrs); + dma_nommu_ops.unmap_sg(dev, sg, nents, direction, attrs); else ppc_iommu_unmap_sg(cell_get_iommu_table(dev), sg, nents, direction, attrs); @@ -661,8 +661,8 @@ static void cell_dma_dev_setup(struct device *dev) { if (get_pci_dma_ops() == &dma_iommu_ops) set_iommu_table_base(dev, cell_get_iommu_table(dev)); - else if (get_pci_dma_ops() == &dma_direct_ops) - set_dma_offset(dev, cell_dma_direct_offset); + else if (get_pci_dma_ops() == &dma_nommu_ops) + set_dma_offset(dev, cell_dma_nommu_offset); else BUG(); } @@ -810,14 +810,14 @@ static int __init cell_iommu_init_disabled(void) unsigned long base = 0, size; /* When no iommu is present, we use direct DMA ops */ - set_pci_dma_ops(&dma_direct_ops); + set_pci_dma_ops(&dma_nommu_ops); /* First make sure all IOC translation is turned off */ cell_disable_iommus(); /* If we have no Axon, we set up the spider DMA magic offset */ if (of_find_node_by_name(NULL, "axon") == NULL) - cell_dma_direct_offset = SPIDER_DMA_OFFSET; + cell_dma_nommu_offset = SPIDER_DMA_OFFSET; /* Now we need to check to see where the memory is mapped * in PCI space. We assume that all busses use the same dma @@ -851,13 +851,13 @@ static int __init cell_iommu_init_disabled(void) return -ENODEV; } - cell_dma_direct_offset += base; + cell_dma_nommu_offset += base; - if (cell_dma_direct_offset != 0) + if (cell_dma_nommu_offset != 0) cell_pci_controller_ops.dma_dev_setup = cell_pci_dma_dev_setup; printk("iommu: disabled, direct DMA offset is 0x%lx\n", - cell_dma_direct_offset); + cell_dma_nommu_offset); return 0; } diff --git a/arch/powerpc/platforms/pasemi/iommu.c b/arch/powerpc/platforms/pasemi/iommu.c index 7fec04de27fc..78b80cbd9768 100644 --- a/arch/powerpc/platforms/pasemi/iommu.c +++ b/arch/powerpc/platforms/pasemi/iommu.c @@ -186,7 +186,7 @@ static void pci_dma_dev_setup_pasemi(struct pci_dev *dev) */ if (dev->vendor == 0x1959 && dev->device == 0xa007 && !firmware_has_feature(FW_FEATURE_LPAR)) { - dev->dev.dma_ops = &dma_direct_ops; + dev->dev.dma_ops = &dma_nommu_ops; /* * Set the coherent DMA mask to prevent the iommu * being used unnecessarily diff --git a/arch/powerpc/platforms/pasemi/setup.c b/arch/powerpc/platforms/pasemi/setup.c index c4a3e93dc324..d0b8ae53660d 100644 --- a/arch/powerpc/platforms/pasemi/setup.c +++ b/arch/powerpc/platforms/pasemi/setup.c @@ -363,7 +363,7 @@ static int pcmcia_notify(struct notifier_block *nb, unsigned long action, return 0; /* We use the direct ops for localbus */ - dev->dma_ops = &dma_direct_ops; + dev->dma_ops = &dma_nommu_ops; return 0; } diff --git a/arch/powerpc/platforms/powernv/pci-ioda.c b/arch/powerpc/platforms/powernv/pci-ioda.c index 749055553064..9582aeb1fe4c 100644 --- a/arch/powerpc/platforms/powernv/pci-ioda.c +++ b/arch/powerpc/platforms/powernv/pci-ioda.c @@ -1850,7 +1850,7 @@ static int pnv_pci_ioda_dma_set_mask(struct pci_dev *pdev, u64 dma_mask) if (bypass) { dev_info(&pdev->dev, "Using 64-bit DMA iommu bypass\n"); - set_dma_ops(&pdev->dev, &dma_direct_ops); + set_dma_ops(&pdev->dev, &dma_nommu_ops); } else { /* * If the device can't set the TCE bypass bit but still wants @@ -1868,7 +1868,7 @@ static int pnv_pci_ioda_dma_set_mask(struct pci_dev *pdev, u64 dma_mask) return rc; /* 4GB offset bypasses 32-bit space */ set_dma_offset(&pdev->dev, (1ULL << 32)); - set_dma_ops(&pdev->dev, &dma_direct_ops); + set_dma_ops(&pdev->dev, &dma_nommu_ops); } else if (dma_mask >> 32 && dma_mask != DMA_BIT_MASK(64)) { /* * Fail the request if a DMA mask between 32 and 64 bits diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c index 69921f72e2da..eaa11334fc8c 100644 --- a/arch/powerpc/platforms/pseries/iommu.c +++ b/arch/powerpc/platforms/pseries/iommu.c @@ -1231,7 +1231,7 @@ static int dma_set_mask_pSeriesLP(struct device *dev, u64 dma_mask) if (dma_offset != 0) { dev_info(dev, "Using 64-bit direct DMA at offset %llx\n", dma_offset); set_dma_offset(dev, dma_offset); - set_dma_ops(dev, &dma_direct_ops); + set_dma_ops(dev, &dma_nommu_ops); ddw_enabled = true; } } diff --git a/arch/powerpc/platforms/pseries/vio.c b/arch/powerpc/platforms/pseries/vio.c index d86938260a86..49e04ec19238 100644 --- a/arch/powerpc/platforms/pseries/vio.c +++ b/arch/powerpc/platforms/pseries/vio.c @@ -618,7 +618,7 @@ static u64 vio_dma_get_required_mask(struct device *dev) static const struct dma_map_ops vio_dma_mapping_ops = { .alloc = vio_dma_iommu_alloc_coherent, .free = vio_dma_iommu_free_coherent, - .mmap = dma_direct_mmap_coherent, + .mmap = dma_nommu_mmap_coherent, .map_sg = vio_dma_iommu_map_sg, .unmap_sg = vio_dma_iommu_unmap_sg, .map_page = vio_dma_iommu_map_page, |