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authorBenjamin Herrenschmidt <benh@kernel.crashing.org>2011-04-05 14:20:31 +1000
committerBenjamin Herrenschmidt <benh@kernel.crashing.org>2011-04-20 11:03:22 +1000
commita5d4f3ad3a28cf046836b9bfae61d532b8f77036 (patch)
tree6940ace9422e91459d819b385dacf9b2ab44bd50 /arch/powerpc/platforms/iseries/exception.S
parent2dd60d79e0202628a47af9812a84d502cc63628c (diff)
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powerpc: Base support for exceptions using HSRR0/1
Pass the register type to the prolog, also provides alternate "HV" version of hardware interrupt (0x500) and adjust LPES accordingly We tag those interrupts by setting bit 0x2 in the trap number Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Diffstat (limited to 'arch/powerpc/platforms/iseries/exception.S')
-rw-r--r--arch/powerpc/platforms/iseries/exception.S2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/platforms/iseries/exception.S b/arch/powerpc/platforms/iseries/exception.S
index 32a56c6dfa72..f7a487231a11 100644
--- a/arch/powerpc/platforms/iseries/exception.S
+++ b/arch/powerpc/platforms/iseries/exception.S
@@ -155,7 +155,7 @@ BEGIN_FTR_SECTION
std r12,PACA_EXGEN+EX_R13(r13)
EXCEPTION_PROLOG_ISERIES_1
FTR_SECTION_ELSE
- EXCEPTION_PROLOG_1(PACA_EXGEN)
+ EXCEPTION_PROLOG_1(PACA_EXGEN, EXC_STD)
EXCEPTION_PROLOG_ISERIES_1
ALT_FTR_SECTION_END_IFCLR(CPU_FTR_SLB)
b data_access_common
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