diff options
| author | Arnd Bergmann <abergman@de.ibm.com> | 2006-03-23 00:00:11 +0100 |
|---|---|---|
| committer | Paul Mackerras <paulus@samba.org> | 2006-03-27 14:48:26 +1100 |
| commit | a33a7d7309d79656bc19a0e96fc4547a1633283e (patch) | |
| tree | f3de6d139af1f1cbdf6d37800c9e13c07e9bc7f6 /arch/powerpc/platforms/cell/spufs/switch.c | |
| parent | 2dd14934c9138c562d93c501e88c6d6f061eb8ba (diff) | |
| download | blackbird-obmc-linux-a33a7d7309d79656bc19a0e96fc4547a1633283e.tar.gz blackbird-obmc-linux-a33a7d7309d79656bc19a0e96fc4547a1633283e.zip | |
[PATCH] spufs: implement mfc access for PPE-side DMA
This patch adds a new file called 'mfc' to each spufs directory.
The file accepts DMA commands that are a subset of what would
be legal DMA commands for problem state register access. Upon
reading the file, a bitmask is returned with the completed
tag groups set.
The file is meant to be used from an abstraction in libspe
that is added by a different patch.
From the kernel perspective, this means a process can now
offload a memory copy from or into an SPE local store
without having to run code on the SPE itself.
The transfer will only be performed while the SPE is owned
by one thread that is waiting in the spu_run system call
and the data will be transferred into that thread's
address space, independent of which thread started the
transfer.
Signed-off-by: Arnd Bergmann <arnd.bergmann@de.ibm.com>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'arch/powerpc/platforms/cell/spufs/switch.c')
| -rw-r--r-- | arch/powerpc/platforms/cell/spufs/switch.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/powerpc/platforms/cell/spufs/switch.c b/arch/powerpc/platforms/cell/spufs/switch.c index 212db28531fa..97898d5d34e5 100644 --- a/arch/powerpc/platforms/cell/spufs/switch.c +++ b/arch/powerpc/platforms/cell/spufs/switch.c @@ -2145,7 +2145,8 @@ static void init_priv1(struct spu_state *csa) csa->priv1.int_mask_class1_RW = CLASS1_ENABLE_SEGMENT_FAULT_INTR | CLASS1_ENABLE_STORAGE_FAULT_INTR; csa->priv1.int_mask_class2_RW = CLASS2_ENABLE_SPU_STOP_INTR | - CLASS2_ENABLE_SPU_HALT_INTR; + CLASS2_ENABLE_SPU_HALT_INTR | + CLASS2_ENABLE_SPU_DMA_TAG_GROUP_COMPLETE_INTR; } static void init_priv2(struct spu_state *csa) |
