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authorPaul Mackerras <paulus@samba.org>2016-02-22 13:41:16 +1100
committerMichael Ellerman <mpe@ellerman.id.au>2016-02-29 20:34:39 +1100
commit84c957560a7a8f548aaf6b6b2b15e6d03b7249e2 (patch)
treef142e102797cd7281f1e7dac90fd632f669f27f2 /arch/powerpc/include/asm/book3s/64/hash.h
parent849f86a630e9c84bf4c9d5dcbfe59dc94b2e15ce (diff)
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powerpc/mm/book3s-64: Move _PAGE_PTE to 2nd most significant bit
This changes _PAGE_PTE for 64-bit Book 3S processors from 0x1 to 0x4000_0000_0000_0000, because that bit is used as the L (leaf) bit by PowerISA v3.0 CPUs in radix mode. The "leaf" bit indicates that the PTE points to a page directly rather than another radix level, which is what the _PAGE_PTE bit means. Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'arch/powerpc/include/asm/book3s/64/hash.h')
-rw-r--r--arch/powerpc/include/asm/book3s/64/hash.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/powerpc/include/asm/book3s/64/hash.h b/arch/powerpc/include/asm/book3s/64/hash.h
index 36ff107b9469..14cfd49b2ab0 100644
--- a/arch/powerpc/include/asm/book3s/64/hash.h
+++ b/arch/powerpc/include/asm/book3s/64/hash.h
@@ -13,7 +13,6 @@
* We could create separate kernel read-only if we used the 3 PP bits
* combinations that newer processors provide but we currently don't.
*/
-#define _PAGE_PTE 0x00001 /* distinguishes PTEs from pointers */
#define _PAGE_BIT_SWAP_TYPE 2
#define _PAGE_USER 0x00004 /* page may be accessed by userspace */
#define _PAGE_EXEC 0x00008 /* execute permission */
@@ -38,6 +37,7 @@
#define _PAGE_SOFT_DIRTY 0x00000
#endif
+#define _PAGE_PTE (1ul << 62) /* distinguishes PTEs from pointers */
#define _PAGE_PRESENT (1ul << 63) /* pte contains a translation */
/*
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