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author | Ralf Baechle <ralf@linux-mips.org> | 2011-05-28 15:27:59 +0100 |
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committer | Ralf Baechle <ralf@linux-mips.org> | 2011-07-20 23:12:10 +0100 |
commit | 852fe3105e94ca26d1b3df7e2cb6878ebdd67608 (patch) | |
tree | b38949922e762e4310b105eec24a9df5352804e4 /arch/mips/mipssim | |
parent | b12acf163f6e52ff7d41aca51382dde17c506068 (diff) | |
download | blackbird-obmc-linux-852fe3105e94ca26d1b3df7e2cb6878ebdd67608.tar.gz blackbird-obmc-linux-852fe3105e94ca26d1b3df7e2cb6878ebdd67608.zip |
MIPS: Malta: Fix crash in SMP kernel on non-CMP systems.
Since 6be63bbbdab66b9185dc6f67c8b1bacb6f37f946 (lmo) rsp.
af3a1f6f4813907e143f87030cde67a9971db533 (kernel.org) the Malta code does
no longer probe for presence of GCMP if CMP is not configured. This means
that the variable gcmp_present well be left at its default value of -1
which normally is meant to indicate that GCMP has not yet been mmapped.
This non-zero value is now interpreted as GCMP being present resulting
in a write attempt to a GCMP register resulting in a crash.
Reported and a build fix on top of my fix by Rob Landley <rob@landley.net>.
Reported-by: Rob Landley <rob@landley.net>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/2413/
Diffstat (limited to 'arch/mips/mipssim')
-rw-r--r-- | arch/mips/mipssim/sim_setup.c | 17 |
1 files changed, 8 insertions, 9 deletions
diff --git a/arch/mips/mipssim/sim_setup.c b/arch/mips/mipssim/sim_setup.c index 55f22a3afe61..19700696a847 100644 --- a/arch/mips/mipssim/sim_setup.c +++ b/arch/mips/mipssim/sim_setup.c @@ -59,18 +59,17 @@ void __init prom_init(void) prom_meminit(); -#ifdef CONFIG_MIPS_MT_SMP - if (cpu_has_mipsmt) - register_smp_ops(&vsmp_smp_ops); - else - register_smp_ops(&up_smp_ops); -#endif + if (cpu_has_mipsmt) { + if (!register_vsmp_smp_ops()) + return; + #ifdef CONFIG_MIPS_MT_SMTC - if (cpu_has_mipsmt) register_smp_ops(&ssmtc_smp_ops); - else - register_smp_ops(&up_smp_ops); + return; #endif + } + + register_up_smp_ops(); } static void __init serial_init(void) |