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| author | Jayachandran C <jchandra@broadcom.com> | 2013-08-11 17:10:16 +0530 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2013-10-29 21:23:51 +0100 |
| commit | c2377a42cd7696022448bcebaa12b07427dc1038 (patch) | |
| tree | 93ee8cab72fba818cf298ecac79c2221e6d86078 /arch/mips/include/asm/thread_info.h | |
| parent | 1a9db0a9ea11ebf2d83d928f4933f21bf6a808e9 (diff) | |
| download | blackbird-obmc-linux-c2377a42cd7696022448bcebaa12b07427dc1038.tar.gz blackbird-obmc-linux-c2377a42cd7696022448bcebaa12b07427dc1038.zip | |
MIPS: Move definition of SMP processor id register to header file
The definition of the CP0 register used to save the smp processor
id is repicated in many files, move them all to thread_info.h.
Signed-off-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/5708/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/thread_info.h')
| -rw-r--r-- | arch/mips/include/asm/thread_info.h | 33 |
1 files changed, 32 insertions, 1 deletions
diff --git a/arch/mips/include/asm/thread_info.h b/arch/mips/include/asm/thread_info.h index 61215a34acc6..e0c8cf3b16ff 100644 --- a/arch/mips/include/asm/thread_info.h +++ b/arch/mips/include/asm/thread_info.h @@ -147,6 +147,37 @@ static inline struct thread_info *current_thread_info(void) #define _TIF_ALLWORK_MASK (_TIF_NOHZ | _TIF_WORK_MASK | \ _TIF_WORK_SYSCALL_EXIT) -#endif /* __KERNEL__ */ +/* + * We stash processor id into a COP0 register to retrieve it fast + * at kernel exception entry. + */ +#if defined(CONFIG_MIPS_MT_SMTC) +#define SMP_CPUID_REG 2, 2 /* TCBIND */ +#define ASM_SMP_CPUID_REG $2, 2 +#define SMP_CPUID_PTRSHIFT 19 +#elif defined(CONFIG_MIPS_PGD_C0_CONTEXT) +#define SMP_CPUID_REG 20, 0 /* XCONTEXT */ +#define ASM_SMP_CPUID_REG $20 +#define SMP_CPUID_PTRSHIFT 48 +#else +#define SMP_CPUID_REG 4, 0 /* CONTEXT */ +#define ASM_SMP_CPUID_REG $4 +#define SMP_CPUID_PTRSHIFT 23 +#endif +#ifdef CONFIG_64BIT +#define SMP_CPUID_REGSHIFT (SMP_CPUID_PTRSHIFT + 3) +#else +#define SMP_CPUID_REGSHIFT (SMP_CPUID_PTRSHIFT + 2) +#endif + +#ifdef CONFIG_MIPS_MT_SMTC +#define ASM_CPUID_MFC0 mfc0 +#define UASM_i_CPUID_MFC0 uasm_i_mfc0 +#else +#define ASM_CPUID_MFC0 MFC0 +#define UASM_i_CPUID_MFC0 UASM_i_MFC0 +#endif + +#endif /* __KERNEL__ */ #endif /* _ASM_THREAD_INFO_H */ |
