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| author | Steven J. Hill <sjhill@mips.com> | 2012-07-06 23:56:00 +0200 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2012-07-06 23:56:00 +0200 |
| commit | f0b77f2c0eed1e37c96b9a995d5a45e9eb4aaca8 (patch) | |
| tree | 6f2c2a85d550aa1d7a20c39c09ef8e6efeb98faa /arch/mips/include/asm/mips-boards | |
| parent | c6a4ebb9ae30ead7684bce623955f74b17df496d (diff) | |
| download | blackbird-obmc-linux-f0b77f2c0eed1e37c96b9a995d5a45e9eb4aaca8.tar.gz blackbird-obmc-linux-f0b77f2c0eed1e37c96b9a995d5a45e9eb4aaca8.zip | |
MIPS: Clean-up GIC and vectored interrupts.
This change adds macros for routing of GIC interrupts for EIC and
non-EIC hardware modes. Also added Malta GIC macros having to do
with performance and timer interrupts.
Signed-off-by: Steven J. Hill <sjhill@mips.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/3576/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/mips-boards')
| -rw-r--r-- | arch/mips/include/asm/mips-boards/maltaint.h | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/mips/include/asm/mips-boards/maltaint.h b/arch/mips/include/asm/mips-boards/maltaint.h index d11aa02a956a..5447d9fc4219 100644 --- a/arch/mips/include/asm/mips-boards/maltaint.h +++ b/arch/mips/include/asm/mips-boards/maltaint.h @@ -86,6 +86,16 @@ #define GIC_CPU_INT4 4 /* . */ #define GIC_CPU_INT5 5 /* Core Interrupt 5 */ +/* MALTA GIC local interrupts */ +#define GIC_INT_TMR (GIC_CPU_INT5) +#define GIC_INT_PERFCTR (GIC_CPU_INT5) + +/* GIC constants */ +/* Add 2 to convert non-eic hw int # to eic vector # */ +#define GIC_CPU_TO_VEC_OFFSET (2) +/* If we map an intr to pin X, GIC will actually generate vector X+1 */ +#define GIC_PIN_TO_VEC_OFFSET (1) + #define GIC_EXT_INTR(x) x /* External Interrupts used for IPI */ |
