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| author | Sergey Ryazanov <ryazanov.s.a@gmail.com> | 2014-10-29 03:18:41 +0400 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2014-11-24 07:45:27 +0100 |
| commit | 1753e74ed8fa3235174d5baa3421cbf8d693a42d (patch) | |
| tree | bb6b196bb76d05dfb2be056218643ed2c0513baa /arch/mips/ath25/ar2315_regs.h | |
| parent | ba910345034aea52d292bdc26b9c6831ab7b54e8 (diff) | |
| download | blackbird-obmc-linux-1753e74ed8fa3235174d5baa3421cbf8d693a42d.tar.gz blackbird-obmc-linux-1753e74ed8fa3235174d5baa3421cbf8d693a42d.zip | |
MIPS: ath25: add interrupts handling routines
Add interrupts initialization and handling routines, also add AHB bus
error interrupt handlers for both SoCs families.
Signed-off-by: Sergey Ryazanov <ryazanov.s.a@gmail.com>
Cc: Linux MIPS <linux-mips@linux-mips.org>
Patchwork: https://patchwork.linux-mips.org/patch/8240/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/ath25/ar2315_regs.h')
| -rw-r--r-- | arch/mips/ath25/ar2315_regs.h | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/mips/ath25/ar2315_regs.h b/arch/mips/ath25/ar2315_regs.h index c97d35127a5d..16e86149cb74 100644 --- a/arch/mips/ath25/ar2315_regs.h +++ b/arch/mips/ath25/ar2315_regs.h @@ -15,6 +15,29 @@ #define __ASM_MACH_ATH25_AR2315_REGS_H /* + * IRQs + */ +#define AR2315_IRQ_MISC (MIPS_CPU_IRQ_BASE + 2) /* C0_CAUSE: 0x0400 */ +#define AR2315_IRQ_WLAN0 (MIPS_CPU_IRQ_BASE + 3) /* C0_CAUSE: 0x0800 */ +#define AR2315_IRQ_ENET0 (MIPS_CPU_IRQ_BASE + 4) /* C0_CAUSE: 0x1000 */ +#define AR2315_IRQ_LCBUS_PCI (MIPS_CPU_IRQ_BASE + 5) /* C0_CAUSE: 0x2000 */ +#define AR2315_IRQ_WLAN0_POLL (MIPS_CPU_IRQ_BASE + 6) /* C0_CAUSE: 0x4000 */ + +/* + * Miscellaneous interrupts, which share IP2. + */ +#define AR2315_MISC_IRQ_UART0 0 +#define AR2315_MISC_IRQ_I2C_RSVD 1 +#define AR2315_MISC_IRQ_SPI 2 +#define AR2315_MISC_IRQ_AHB 3 +#define AR2315_MISC_IRQ_APB 4 +#define AR2315_MISC_IRQ_TIMER 5 +#define AR2315_MISC_IRQ_GPIO 6 +#define AR2315_MISC_IRQ_WATCHDOG 7 +#define AR2315_MISC_IRQ_IR_RSVD 8 +#define AR2315_MISC_IRQ_COUNT 9 + +/* * Address map */ #define AR2315_SPI_READ_BASE 0x08000000 /* SPI flash */ |
