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authorMichael Hennerich <michael.hennerich@analog.com>2008-08-06 17:55:32 +0800
committerBryan Wu <cooloney@kernel.org>2008-08-06 17:55:32 +0800
commit56f5f59052bb662a77d5ffd6cbe5861a2ef2407c (patch)
tree4c645e253579fa7d3e912144bd317a0236f27a5a /arch/blackfin/mach-common
parent15b07536892284449ac5cd9488a8da1054b4295b (diff)
downloadblackbird-obmc-linux-56f5f59052bb662a77d5ffd6cbe5861a2ef2407c.tar.gz
blackbird-obmc-linux-56f5f59052bb662a77d5ffd6cbe5861a2ef2407c.zip
Blackfin arch: Fix Bug - System with EMAC driver enabled - Core not idling
- Disable all bits in SIC_IWR unless we are going into a real (DPMC) power saving mode. Any Interrupt can wake the core form it's idle state. - Remove deep sleep mode as it is not going to be used anywhere: We support sleep, sleep deeper and hibernate. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Signed-off-by: Bryan Wu <cooloney@kernel.org>
Diffstat (limited to 'arch/blackfin/mach-common')
-rw-r--r--arch/blackfin/mach-common/dpmc_modes.S56
-rw-r--r--arch/blackfin/mach-common/ints-priority.c8
-rw-r--r--arch/blackfin/mach-common/pm.c8
3 files changed, 8 insertions, 64 deletions
diff --git a/arch/blackfin/mach-common/dpmc_modes.S b/arch/blackfin/mach-common/dpmc_modes.S
index 5e3f1d8a4fb8..838b0b2ce9a5 100644
--- a/arch/blackfin/mach-common/dpmc_modes.S
+++ b/arch/blackfin/mach-common/dpmc_modes.S
@@ -78,62 +78,6 @@ ENTRY(_hibernate_mode)
jump .Lforever;
ENDPROC(_hibernate_mode)
-ENTRY(_deep_sleep)
- [--SP] = ( R7:0, P5:0 );
- [--SP] = RETS;
-
- CLI R4;
-
- R0 = IWR_ENABLE(0);
- R1 = IWR_DISABLE_ALL;
- R2 = IWR_DISABLE_ALL;
-
- call _set_sic_iwr;
-
- call _set_dram_srfs;
-
- /* Clear all the interrupts,bits sticky */
- R0 = 0xFFFF (Z);
- call _set_rtc_istat
-
- P0.H = hi(PLL_CTL);
- P0.L = lo(PLL_CTL);
- R0 = W[P0](z);
- BITSET (R0, 5);
- W[P0] = R0.L;
-
- call _test_pll_locked;
-
- SSYNC;
- IDLE;
-
- call _unset_dram_srfs;
-
- call _test_pll_locked;
-
- R0 = IWR_ENABLE(0);
- R1 = IWR_DISABLE_ALL;
- R2 = IWR_DISABLE_ALL;
-
- call _set_sic_iwr;
-
- P0.H = hi(PLL_CTL);
- P0.L = lo(PLL_CTL);
- R0 = w[p0](z);
- BITCLR (R0, 3);
- BITCLR (R0, 5);
- BITCLR (R0, 8);
- w[p0] = R0;
- IDLE;
- call _test_pll_locked;
-
- STI R4;
-
- RETS = [SP++];
- ( R7:0, P5:0 ) = [SP++];
- RTS;
-ENDPROC(_deep_sleep)
-
ENTRY(_sleep_deeper)
[--SP] = ( R7:0, P5:0 );
[--SP] = RETS;
diff --git a/arch/blackfin/mach-common/ints-priority.c b/arch/blackfin/mach-common/ints-priority.c
index e713b9db867d..4271ef3f201a 100644
--- a/arch/blackfin/mach-common/ints-priority.c
+++ b/arch/blackfin/mach-common/ints-priority.c
@@ -1068,13 +1068,13 @@ int __init init_arch_irq(void)
IMASK_IVG10 | IMASK_IVG9 | IMASK_IVG8 | IMASK_IVG7 | IMASK_IVGHW;
#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561)
- bfin_write_SIC_IWR0(IWR_ENABLE_ALL);
- bfin_write_SIC_IWR1(IWR_ENABLE_ALL);
+ bfin_write_SIC_IWR0(IWR_DISABLE_ALL);
+ bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
# ifdef CONFIG_BF54x
- bfin_write_SIC_IWR2(IWR_ENABLE_ALL);
+ bfin_write_SIC_IWR2(IWR_DISABLE_ALL);
# endif
#else
- bfin_write_SIC_IWR(IWR_ENABLE_ALL);
+ bfin_write_SIC_IWR(IWR_DISABLE_ALL);
#endif
return 0;
diff --git a/arch/blackfin/mach-common/pm.c b/arch/blackfin/mach-common/pm.c
index 143134b852ea..a17ace3e0e41 100644
--- a/arch/blackfin/mach-common/pm.c
+++ b/arch/blackfin/mach-common/pm.c
@@ -83,13 +83,13 @@ void bfin_pm_suspend_standby_enter(void)
bfin_pm_standby_restore();
#if defined(CONFIG_BF54x) || defined(CONFIG_BF52x) || defined(CONFIG_BF561)
- bfin_write_SIC_IWR0(IWR_ENABLE_ALL);
- bfin_write_SIC_IWR1(IWR_ENABLE_ALL);
+ bfin_write_SIC_IWR0(IWR_DISABLE_ALL);
+ bfin_write_SIC_IWR1(IWR_DISABLE_ALL);
# ifdef CONFIG_BF54x
- bfin_write_SIC_IWR2(IWR_ENABLE_ALL);
+ bfin_write_SIC_IWR2(IWR_DISABLE_ALL);
# endif
#else
- bfin_write_SIC_IWR(IWR_ENABLE_ALL);
+ bfin_write_SIC_IWR(IWR_DISABLE_ALL);
#endif
local_irq_restore(flags);
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