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authorHeiko Stuebner <heiko@sntech.de>2011-10-14 15:08:57 +0900
committerKukjin Kim <kgene.kim@samsung.com>2011-10-14 15:15:53 +0900
commit33ccedfd1b79a7cf649b2991e95bae415c013240 (patch)
treea5210ff54f370adb3dd852cb1a99abaa0a7e2e27 /arch/arm/plat-samsung/include/plat/audio-simtec.h
parent866a1c8c354e613c2bf378a1cd562756d4a32e75 (diff)
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ARM: S3C24XX: use clk_get_rate to init fclk in common_setup_clocks
Previously the fclk rate was calculated by dividing the pll through the divider value of the armdiv. With a real armdiv clk in place it's possible to simply read its value, which does essentially the same. This change makes the whole fdiv_fn function pointers supplied to s3c2443_common_init_clocks and s3c2443_common_setup_clocks obsolete, so remove it too. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'arch/arm/plat-samsung/include/plat/audio-simtec.h')
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