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authorSantosh Shilimkar <santosh.shilimkar@ti.com>2010-02-15 18:03:37 +0530
committerTony Lindgren <tony@atomide.com>2010-02-23 10:57:40 -0800
commitb7ebb10b0a9793effa4a74a3c29049b44c6b8176 (patch)
tree3559425a0c9b4759b25cc95b2690d139cfdfcc96 /arch/arm/plat-omap/include/plat/common.h
parente03d37d85909fd9b09e78087c57b45972a7664ad (diff)
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omap2/3/4: ioremap omap_globals module
This is a clean-up patch towards dynamic allocation of IO space instead of using harcoded macros to calculate virtual addresses. Also update the sdrc, prcm and control module to allocate iospace dynamically Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Reviewed-by: Kevin Hilman <khilman@deeprootsystems.com> Reviewed-by: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/plat-omap/include/plat/common.h')
-rw-r--r--arch/arm/plat-omap/include/plat/common.h18
1 files changed, 11 insertions, 7 deletions
diff --git a/arch/arm/plat-omap/include/plat/common.h b/arch/arm/plat-omap/include/plat/common.h
index e04a58ec53a2..7556e271942e 100644
--- a/arch/arm/plat-omap/include/plat/common.h
+++ b/arch/arm/plat-omap/include/plat/common.h
@@ -37,16 +37,20 @@ extern void __iomem *gic_cpu_base_addr;
extern void omap_map_common_io(void);
extern struct sys_timer omap_timer;
-/* IO bases for various OMAP processors */
+/*
+ * IO bases for various OMAP processors
+ * Except the tap base, rest all the io bases
+ * listed are physical addresses.
+ */
struct omap_globals {
u32 class; /* OMAP class to detect */
void __iomem *tap; /* Control module ID code */
- void __iomem *sdrc; /* SDRAM Controller */
- void __iomem *sms; /* SDRAM Memory Scheduler */
- void __iomem *ctrl; /* System Control Module */
- void __iomem *prm; /* Power and Reset Management */
- void __iomem *cm; /* Clock Management */
- void __iomem *cm2;
+ unsigned long sdrc; /* SDRAM Controller */
+ unsigned long sms; /* SDRAM Memory Scheduler */
+ unsigned long ctrl; /* System Control Module */
+ unsigned long prm; /* Power and Reset Management */
+ unsigned long cm; /* Clock Management */
+ unsigned long cm2;
unsigned long uart1_phys;
unsigned long uart2_phys;
unsigned long uart3_phys;
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