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| author | Eric Bénard <eric@eukrea.com> | 2010-10-12 13:12:32 +0200 |
|---|---|---|
| committer | Sascha Hauer <s.hauer@pengutronix.de> | 2010-10-19 18:45:00 +0200 |
| commit | c074512905c0a08be2a91670bdd69cd1de4e2823 (patch) | |
| tree | 49b5f93768a22e4867d69999c0d136b9a248f063 /arch/arm/plat-mxc/include/mach/mx51.h | |
| parent | 6a001b886c8c4ff7477a3692a2d87a9dbdd860ee (diff) | |
| download | blackbird-obmc-linux-c074512905c0a08be2a91670bdd69cd1de4e2823.tar.gz blackbird-obmc-linux-c074512905c0a08be2a91670bdd69cd1de4e2823.zip | |
imx-esdhc: update devices registration
Tested on i.MX25 and i.MX35 and i.MX51
Signed-off-by: Eric Bénard <eric@eukrea.com>
Diffstat (limited to 'arch/arm/plat-mxc/include/mach/mx51.h')
| -rw-r--r-- | arch/arm/plat-mxc/include/mach/mx51.h | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/arch/arm/plat-mxc/include/mach/mx51.h b/arch/arm/plat-mxc/include/mach/mx51.h index c54b5c32d82e..2af7a1056fc1 100644 --- a/arch/arm/plat-mxc/include/mach/mx51.h +++ b/arch/arm/plat-mxc/include/mach/mx51.h @@ -64,13 +64,13 @@ #define MX51_SPBA0_BASE_ADDR_VIRT 0xfb100000 #define MX51_SPBA0_SIZE SZ_1M -#define MX51_MMC_SDHC1_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x04000) -#define MX51_MMC_SDHC2_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x08000) +#define MX51_ESDHC1_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x04000) +#define MX51_ESDHC2_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x08000) #define MX51_UART3_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x0c000) #define MX51_ECSPI1_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x10000) #define MX51_SSI2_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x14000) -#define MX51_MMC_SDHC3_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x20000) -#define MX51_MMC_SDHC4_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x24000) +#define MX51_ESDHC3_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x20000) +#define MX51_ESDHC4_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x24000) #define MX51_SPDIF_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x28000) #define MX51_ATA_DMA_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x30000) #define MX51_SLIM_DMA_BASE_ADDR (MX51_SPBA0_BASE_ADDR + 0x34000) @@ -280,10 +280,10 @@ */ #define MX51_MXC_INT_BASE 0 #define MX51_MXC_INT_RESV0 0 -#define MX51_MXC_INT_MMC_SDHC1 1 -#define MX51_MXC_INT_MMC_SDHC2 2 -#define MX51_MXC_INT_MMC_SDHC3 3 -#define MX51_MXC_INT_MMC_SDHC4 4 +#define MX51_INT_ESDHC1 1 +#define MX51_INT_ESDHC2 2 +#define MX51_INT_ESDHC3 3 +#define MX51_INT_ESDHC4 4 #define MX51_MXC_INT_RESV5 5 #define MX51_INT_SDMA 6 #define MX51_MXC_INT_IOMUX 7 |
