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author | Nicolas Pitre <nicolas.pitre@linaro.org> | 2014-06-24 18:32:51 +0100 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2014-07-18 11:58:00 +0100 |
commit | 3721924c81541d828d73d0e36dcbae8fd93f0885 (patch) | |
tree | ab7e046674055bd4fb0f0c1b321e792201c1f0b2 /arch/arm/mach-vexpress/tc2_pm.c | |
parent | 731542ef44a3dea7726a03f906111700847cf777 (diff) | |
download | blackbird-obmc-linux-3721924c81541d828d73d0e36dcbae8fd93f0885.tar.gz blackbird-obmc-linux-3721924c81541d828d73d0e36dcbae8fd93f0885.zip |
ARM: 8081/1: MCPM: provide infrastructure to allow for MCPM loopback
The kernel already has the responsibility to handle resources such as the
CCI when hotplugging CPUs, during the booting of secondary CPUs, and when
resuming from suspend/idle. It would be more coherent and less confusing
if the CCI for the boot CPU (or cluster) was also initialized by the
kernel rather than expecting the firmware/bootloader to do it and only in
that case. After all, the kernel has all the necessary code already and
the bootloader shouldn't have to care at all.
The CCI may be turned on only when the cache is off. Leveraging the CPU
suspend code to loop back through the low-level MCPM entry point is all
that is needed to properly turn on the CCI from the kernel by using the
same code as during secondary boot.
Let's provide a generic MCPM loopback function that can be invoked by
backend initialization code to set things (CCI or similar) on the boot
CPU just as it is done for the other CPUs.
Signed-off-by: Nicolas Pitre <nico@linaro.org>
Reviewed-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Kevin Hilman <khilman@linaro.org>
Tested-by: Doug Anderson <dianders@chromium.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-vexpress/tc2_pm.c')
0 files changed, 0 insertions, 0 deletions