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authorNishanth Menon <nm@ti.com>2016-03-31 16:58:35 -0500
committerTony Lindgren <tony@atomide.com>2016-04-13 14:30:10 -0700
commitdac4fba2cd8b34e175e54e4740816a1a4de3dcc9 (patch)
tree76d39ac8696ef92d349fab4a616d0cea30d7f66d /arch/arm/mach-ux500
parent41feb8efd636c99ff73a2e6b8b4a57e2dd569b4b (diff)
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ARM: OMAP: DRA7: powerdomain data: Remove wrong OSWR capability
Open Switch Retention(OSWR) is a retention state which is unsupported in DRA7 SoC. This state is achieved when power state is set to retention and logic power state is set to OFF. Even though DRA7 architecture is a OMAP derivative, none of the powerdomains are actually implemented to achieve OSWR in the SoC. Signed-off-by: Nishanth Menon <nm@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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