diff options
| author | Magnus Damm <damm@opensource.se> | 2012-03-28 19:22:46 +0900 |
|---|---|---|
| committer | Rafael J. Wysocki <rjw@sisk.pl> | 2012-04-11 12:11:48 +0200 |
| commit | d7e7e4ffc64f700e876a9f3b2727febaa2041221 (patch) | |
| tree | 087be2bd61890b659eaec51f0437d379940ef3e4 /arch/arm/mach-shmobile/include | |
| parent | 0f2c9f20e4e339de30cfd5613dfa9505e7b9c58b (diff) | |
| download | blackbird-obmc-linux-d7e7e4ffc64f700e876a9f3b2727febaa2041221.tar.gz blackbird-obmc-linux-d7e7e4ffc64f700e876a9f3b2727febaa2041221.zip | |
ARM: mach-shmobile: Introduce INTC_IRQ_PINS_16H
Add INTC_IRQ_PINS_16H to allow broken out support of the
the high 16 external interrupt pins. On SoCs with 32 external
interrupt pins the interrupt vectors for the low 16 and the
high 16 interrupt pins are sparesly populated. The low 16 are
at 0x0200 and high 16 are at 0x3200 which with current macros
results in a separation of 384 linux interrupts. This sparse
population makes it unsuitable with a single IRQ domain to
cover the full IRQ range, so this macro breaks out the 32 pins
into two separate 16 bit controllers to allow two independent
INTC instances with two separate IRQ domains.
Signed-off-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
Diffstat (limited to 'arch/arm/mach-shmobile/include')
| -rw-r--r-- | arch/arm/mach-shmobile/include/mach/intc.h | 44 |
1 files changed, 44 insertions, 0 deletions
diff --git a/arch/arm/mach-shmobile/include/mach/intc.h b/arch/arm/mach-shmobile/include/mach/intc.h index 8b22258c8caa..a5603c76cfe0 100644 --- a/arch/arm/mach-shmobile/include/mach/intc.h +++ b/arch/arm/mach-shmobile/include/mach/intc.h @@ -142,6 +142,50 @@ static struct intc_desc p ## _desc __initdata = { \ p ## _sense_registers, p ## _ack_registers) \ } +#define INTC_IRQ_PINS_16H(p, base, vect, str) \ + \ +static struct resource p ## _resources[] __initdata = { \ + [0] = { \ + .start = base, \ + .end = base + 0x64, \ + .flags = IORESOURCE_MEM, \ + }, \ +}; \ + \ +enum { \ + p ## _UNUSED = 0, \ + INTC_IRQ_PINS_ENUM_16H(p), \ +}; \ + \ +static struct intc_vect p ## _vectors[] __initdata = { \ + INTC_IRQ_PINS_VECT_16H(p, vect), \ +}; \ + \ +static struct intc_mask_reg p ## _mask_registers[] __initdata = { \ + INTC_IRQ_PINS_MASK_16H(p, base), \ +}; \ + \ +static struct intc_prio_reg p ## _prio_registers[] __initdata = { \ + INTC_IRQ_PINS_PRIO_16H(p, base), \ +}; \ + \ +static struct intc_sense_reg p ## _sense_registers[] __initdata = { \ + INTC_IRQ_PINS_SENSE_16H(p, base), \ +}; \ + \ +static struct intc_mask_reg p ## _ack_registers[] __initdata = { \ + INTC_IRQ_PINS_ACK_16H(p, base), \ +}; \ + \ +static struct intc_desc p ## _desc __initdata = { \ + .name = str, \ + .resource = p ## _resources, \ + .num_resources = ARRAY_SIZE(p ## _resources), \ + .hw = INTC_HW_DESC(p ## _vectors, NULL, \ + p ## _mask_registers, p ## _prio_registers, \ + p ## _sense_registers, p ## _ack_registers) \ +} + #define INTC_IRQ_PINS_32(p, base, vect, str) \ \ static struct resource p ## _resources[] __initdata = { \ |
