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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2010-08-28 14:12:05 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2010-08-28 14:12:05 -0700 |
| commit | 45b5bed7bc02a7f04127ac32f8fe7117b6baa419 (patch) | |
| tree | 1cfa97e50e3e7be28f025e580a3e6e5deedaa737 /arch/arm/mach-s5pv310/include/mach/irqs.h | |
| parent | 30c0f6a04975d557f3c1a4e640b3808b1231c3ef (diff) | |
| parent | 766211e74818e655593fd3272cbf84868220f9e5 (diff) | |
| download | blackbird-obmc-linux-45b5bed7bc02a7f04127ac32f8fe7117b6baa419.tar.gz blackbird-obmc-linux-45b5bed7bc02a7f04127ac32f8fe7117b6baa419.zip | |
Merge branch 's5p-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung
* 's5p-fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung:
ARM: S5PV310: Fix on Secondary CPU startup
ARM: S5PV310: Bug fix on uclk1 and sclk_pwm
ARM: S5PV310: Fix missed uart clocks
ARM: S5PV310: Should be clk_sclk_apll not clk_mout_apll
ARM: S5PV310: Fix on PLL setting for S5PV310
ARM: S5PV310: Add CMU block for S5PV310 Clock
ARM: S5PV310: Fix on typo irqs.h of S5PV310
ARM: S5PV310: Fix on default ZRELADDR of ARCH_S5PV310
ARM: S5PV310: Fix on GPIO base addresses
ARM: SAMSUNG: Fix on build warning regarding VMALLOC_END type
ARM: S5P: VMALLOC_END should be unsigned long
Diffstat (limited to 'arch/arm/mach-s5pv310/include/mach/irqs.h')
| -rw-r--r-- | arch/arm/mach-s5pv310/include/mach/irqs.h | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/arch/arm/mach-s5pv310/include/mach/irqs.h b/arch/arm/mach-s5pv310/include/mach/irqs.h index 56885ca3773c..4cdedda6e652 100644 --- a/arch/arm/mach-s5pv310/include/mach/irqs.h +++ b/arch/arm/mach-s5pv310/include/mach/irqs.h @@ -15,12 +15,14 @@ #include <plat/irqs.h> -/* Private Peripheral Interrupt */ +/* PPI: Private Peripheral Interrupt */ + #define IRQ_PPI(x) S5P_IRQ(x+16) #define IRQ_LOCALTIMER IRQ_PPI(13) -/* Shared Peripheral Interrupt */ +/* SPI: Shared Peripheral Interrupt */ + #define IRQ_SPI(x) S5P_IRQ(x+32) #define IRQ_EINT0 IRQ_SPI(40) @@ -36,7 +38,7 @@ #define IRQ_PCIE IRQ_SPI(50) #define IRQ_SYSTEM_TIMER IRQ_SPI(51) #define IRQ_MFC IRQ_SPI(52) -#define IRQ_WTD IRQ_SPI(53) +#define IRQ_WDT IRQ_SPI(53) #define IRQ_AUDIO_SS IRQ_SPI(54) #define IRQ_AC97 IRQ_SPI(55) #define IRQ_SPDIF IRQ_SPI(56) @@ -67,8 +69,9 @@ #define IRQ_IIC COMBINER_IRQ(27, 0) /* Set the default NR_IRQS */ + #define NR_IRQS COMBINER_IRQ(MAX_COMBINER_NR, 0) #define MAX_COMBINER_NR 39 -#endif /* ASM_ARCH_IRQS_H */ +#endif /* __ASM_ARCH_IRQS_H */ |
