diff options
| author | Boojin Kim <boojin.kim@samsung.com> | 2011-09-02 09:44:39 +0900 |
|---|---|---|
| committer | Vinod Koul <vinod.koul@intel.com> | 2011-09-14 11:10:03 +0530 |
| commit | 3091e61173211de3fbd9bcb99ddc33333377fcb7 (patch) | |
| tree | 66c27156e48119d1520bf5aad7502c9d7a56064e /arch/arm/mach-s5p64x0/clock-s5p6440.c | |
| parent | a422bd0f6d50bcb9c529d890bde70295915bb3e9 (diff) | |
| download | blackbird-obmc-linux-3091e61173211de3fbd9bcb99ddc33333377fcb7.tar.gz blackbird-obmc-linux-3091e61173211de3fbd9bcb99ddc33333377fcb7.zip | |
ARM: S5P64X0: Use generic DMA PL330 driver
This patch makes Samsung S5P64X0 to use DMA PL330 driver
on DMADEVICE. The S5P64X0 uses DMA generic APIs instead of
SAMSUNG specific S3C-PL330 APIs.
Signed-off-by: Boojin Kim <boojin.kim@samsung.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Diffstat (limited to 'arch/arm/mach-s5p64x0/clock-s5p6440.c')
| -rw-r--r-- | arch/arm/mach-s5p64x0/clock-s5p6440.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/arm/mach-s5p64x0/clock-s5p6440.c b/arch/arm/mach-s5p64x0/clock-s5p6440.c index 0e9cd3092dd2..c1f548f69a0d 100644 --- a/arch/arm/mach-s5p64x0/clock-s5p6440.c +++ b/arch/arm/mach-s5p64x0/clock-s5p6440.c @@ -146,7 +146,7 @@ static struct clk init_clocks_off[] = { .enable = s5p64x0_hclk0_ctrl, .ctrlbit = (1 << 8), }, { - .name = "pdma", + .name = "dma", .parent = &clk_hclk_low.clk, .enable = s5p64x0_hclk0_ctrl, .ctrlbit = (1 << 12), @@ -499,6 +499,11 @@ static struct clksrc_clk *sysclks[] = { &clk_pclk_low, }; +static struct clk dummy_apb_pclk = { + .name = "apb_pclk", + .id = -1, +}; + void __init_or_cpufreq s5p6440_setup_clocks(void) { struct clk *xtal_clk; @@ -581,5 +586,7 @@ void __init s5p6440_register_clocks(void) s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off)); + s3c24xx_register_clock(&dummy_apb_pclk); + s3c_pwmclk_init(); } |
